參數(shù)資料
型號: K4J52324QC-BJ12
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 512Mbit GDDR3 SDRAM
中文描述: 512MB的GDDR3 SDRAM的
文件頁數(shù): 39/57頁
文件大?。?/td> 1246K
代理商: K4J52324QC-BJ12
- 39 -
Rev 1.0 (Mar 2005)
512M GDDR3 SDRAM
K4J52324QC-B
Consecutive WRITE to WRITE
DON’T CARE
TRANSITIONING DATA
NOTE
:
NOP
NOP
WRITE
NOP
NOP
WRITE
T0
T1
T3
T3n
T4
T5
CK#
CK
COMMAND
ADDRESS
Bank
Col b
t
DQSS
(NOM)
NOP
T4n
T5n
T6
DQ
DM
WDQS
T2
T6n
T7
NOP
DI
b
DI
n
Bank
Col n
1. DI
b
, etc. = data-in for column
b
, etc.
2. Three subsequent elements of data-in are applied in the programmed order following DI
b
.
3. Three subsequent elements of data-in are applied in the programmed order following DI
n
.
4. Burst of 4 is shown.
5. Each WRITE command may be to any bank of the same device.
6. Write latency is set to 3
相關(guān)PDF資料
PDF描述
K4J52324QC-BJ14 512Mbit GDDR3 SDRAM
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