參數(shù)資料
型號: K4J52324QC-BC20
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 512Mbit GDDR3 SDRAM
中文描述: 512MB的GDDR3 SDRAM的
文件頁數(shù): 35/57頁
文件大?。?/td> 1246K
代理商: K4J52324QC-BC20
- 35 -
Rev 1.0 (Mar 2005)
512M GDDR3 SDRAM
K4J52324QC-B
READ to WRITE
DON’T CARE
TRANSITIONING DATA
NOTE
:
1. DO
n
= data-out from column
n
.
2. DI
b
= data-in from column
b
.
3. Burst length = 4
4. One subsequent element of data-out appears in the programmed order following DO
n
.
5. Data-in elements are applied following DI
b
in the programmed order.
6. Shown with nominal t
AC
and t
DQSQ.
7. t
DQSS
in nominal case.
8. RDQS will start driving high one half-clock cycle prior to the first falling edge of RDQS.
9. The gap between data termination enable to the first data-in should be greater than 1tCK
NOP
NOP
WRITE
NOP
NOP
READ
T0
T7
T8
T9
T9n
T10
T11
/CK
CK
COMMAND
ADDRESS
RDQS
DQ
Bank
Col n
CL = 8
DM
T8n
n
DI
t
WL
= 4
WDQS
~~
~~
~~
DQ
NOP
T12
T12n
Bank a,
Col b
1tCK <
Termination
DQ Termination Disabled
DQ Termination Enbaled
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