參數(shù)資料
型號(hào)： K4J52324QC-BC14
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 512Mbit GDDR3 SDRAM
中文描述： 512MB的GDDR3 SDRAM的
文件頁(yè)數(shù)： 3/57頁(yè)
文件大?。?/td> 1246K
代理商： K4J52324QC-BC14
- 3 -
Rev 1.0 (Mar 2005)
512M GDDR3 SDRAM
K4J52324QC-B
Revision History
Revision 0.9 (November 11, 2004)
Corrected typo in boundary scan order table.
Revision 0.8 (October 10, 2004)
Changed part number from K4J52324Q
B-G
to K4J52324Q
C-B
-Package code attribute re-defined : G .... 144FBGA, Leaded V .... 144FBGA, Lead-free
A .... 136FBGA, Leaded B .... 136FBGA, Lead-free
Revision 0.7 (October 5, 2004)
DC spec defined.
Comment added on how to change the clock frequency after the power-up (page 14)
Comment added on read to write timing diagram on page 32 which specify the timing interval from data termination enable to the first
data-in should be greater than 1tCK.
Changed CL(Cas Latency) of -GC14 from 9tCK to 10tCK . Changed CL(Cas Latency) of -GC16 from 8tCK to 9tCK
Typo corrected in boundary scan order table and additional remark for boundary scan added on page 17.
Changed tDCERR from 0.2tCK to 0.03tCK (Typo)
Revision 0.6 (September 15, 2004)
Typo corrected
Removed tWR_A to avoid confusion. Instead, tWR represent write recovery time for both normal precharge and Auto-precharge cases.
Accordingly tDAL adjusted by tWR for each frequency.
Clock jitter spec added.
Changed input capacitance.
Fixed CL of -GC12 to 11tCK where as specified with 10tCK or 11tCK previousely
.
Revision 0.5 (June 4, 2004)
Typo corrected (Package ball out)
Revision 0.4 (May 13, 2004)
Changed tRRD from 12ns to 10ns
Added tFAW specification in the spec which defined as five times of tRRD
Added boundary scan specification & added package dimension
Revision 0.3 (January 26, 2004)
Changed part number of 512Mb(x32) GDDR3 from K4J53324QB-GC to K4J52324QB-GC
Revision 0.2 (January 5, 2004)
Added Write Latency 5, 6, and 7 (clock) in the spec.
Added tWR_A 8 and 9 (clock) in the spec.
Revision 0.1 (December 18, 2003)
Changed CL of -GC12 from 9tCK to 10tCK
Changed tCK(max) from 3.0ns to 3.3ns
Revision 0.0 (December 18 , 2003) -
Target Spec
相關(guān)PDF資料
PDF描述
K4J52324QC-BC16 512Mbit GDDR3 SDRAM
K4J52324QC-BC20 512Mbit GDDR3 SDRAM
K4J52324QC-BJ12 512Mbit GDDR3 SDRAM
K4J52324QC-BJ14 512Mbit GDDR3 SDRAM
K4M281633F 2M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
K4J52324QC-BC14000 制造商:Samsung Semiconductor 功能描述:GDDR3 SDRAM X32 BOC LEAD PART 10W - Trays
K4J52324QC-BC16 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mbit GDDR3 SDRAM
K4J52324QC-BC20 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mbit GDDR3 SDRAM
K4J52324QC-BJ12 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mbit GDDR3 SDRAM
K4J52324QC-BJ14 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mbit GDDR3 SDRAM
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