參數資料
型號： K4J52324QC-BC14
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 512Mbit GDDR3 SDRAM
中文描述： 512MB的GDDR3 SDRAM的
文件頁數： 14/57頁
文件大?。?/td> 1246K
代理商： K4J52324QC-BC14
- 14 -
Rev 1.0 (Mar 2005)
512M GDDR3 SDRAM
K4J52324QC-B
WRITE LATENCY
The Write latency (WL) is the delay, in clock cycles, between the registration of a WRITE command and the availability of the first bit of
input data. The latency can be set from 1 to 7 clocks depending in the operating frequency and desired current draw. When the write
latencies are set to 1 or 2 or 3 clocks, the input receivers never turn off when the WRITE command is registered. If a WRITE command
is registered at clock edge
n
, and the latency is
m
clocks, the data will be available nominally coincident with clock edge
n
+
m
. Reserved
states should not be used as unknown operation or incompatibility with future versions may result.
NOP
NOP
NOP
WRITE
T0
T1
T3
T3n
/CK
CK
COMMAND
T2
DQ
WL = 3
NOP
NOP
NOP
WRITE
T0
T2
T4
T4n
/CK
CK
COMMAND
T3
DQ
WL = 4
Burst Length = 4 in the cases shown
DON’T CARE
TRANSITIONING DATA
WDQS
WDQS
～～
～～
～～
相關PDF資料
PDF描述
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相關代理商/技術參數
參數描述
K4J52324QC-BC14000 制造商:Samsung Semiconductor 功能描述:GDDR3 SDRAM X32 BOC LEAD PART 10W - Trays
K4J52324QC-BC16 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mbit GDDR3 SDRAM
K4J52324QC-BC20 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mbit GDDR3 SDRAM
K4J52324QC-BJ12 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mbit GDDR3 SDRAM
K4J52324QC-BJ14 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mbit GDDR3 SDRAM
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