參數(shù)資料
型號: K4H561638F
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 256Mb F-die DDR SDRAM Specification
中文描述: 256Mb的的F - DDR SDRAM內(nèi)存芯片規(guī)格
文件頁數(shù): 16/23頁
文件大?。?/td> 329K
代理商: K4H561638F
DDR SDRAM
DDR SDRAM 256Mb F-die (x8, x16)
Rev. 1.3 October, 2004
System Characteristics for DDR SDRAM
The following specification parameters are required in systems using DDR333, DDR266 & DDR200 devices to ensure
proper system performance. these characteristics are for system simulation purposes and are guaranteed by design.
Table 1 :
Input Slew Rate for DQ, DQS, and DM
Table 2
:
Input Setup & Hold Time Derating for Slew Rate
Table 3 : Input/Output Setup & Hold Time Derating for Slew Rate
AC CHARACTERISTICS
DDR333
DDR266
DDR200
PARAMETER
SYMBOL
MIN
MAX
MIN
MAX
MIN
MAX
Units
Notes
DQ/DM/DQS input slew rate measured between
VIH(DC), VIL(DC) and VIL(DC), VIH(DC)
DCSLEW
0.5
4.0
0.5
4.0
0.5
4.0
V/ns
a, m
Input Slew Rate
tIS
tIH
Units
Notes
0.5 V/ns
0
0
ps
i
0.4 V/ns
+50
0
ps
i
0.3 V/ns
+100
0
ps
i
Input Slew Rate
tDS
tDH
Units
Notes
0.5 V/ns
0
0
ps
k
0.4 V/ns
+75
+75
ps
k
0.3 V/ns
+150
+150
ps
k
Parameter
Symbol
B3
(DDR333@CL=2.5))
AA
(DDR266@CL=2.0)
A2
(DDR266@CL=2.0)
B0
(DDR266@CL=2.5))
Unit
Note
Min
Max
Min
Max
Min
Max
Min
Max
Mode register set cycle time
tMRD
12
15
15
15
ns
DQ & DM setup time to DQS
tDS
0.45
0.5
0.5
0.5
ns
j, k
DQ & DM hold time to DQS
tDH
0.45
0.5
0.5
0.5
ns
j, k
Control & Address input pulse width
tIPW
2.2
2.2
2.2
2.2
ns
8
DQ & DM input pulse width
tDIPW
1.75
1.75
1.75
1.75
ns
8
Power down exit time
tPDEX
6
7.5
7.5
7.5
ns
Exit self refresh to non-Read command
tXSNR
75
75
75
75
ns
Exit self refresh to read command
tXSRD
200
200
200
200
tCK
Refresh interval time
tREFI
7.8
7.8
7.8
7.8
us
4
Output DQS valid window
tQH
tHP
-tQHS
-
tHP
-tQHS
-
tHP
-tQHS
-
tHP
-tQHS
-
ns
11
Clock half period
tHP
tCLmin
or tCHmin
-
tCLmin
or tCHmin
-
tCLmin
or tCHmin
-
tCLmin
or tCHmin
-
ns
10, 11
Data hold skew factor
tQHS
0.55
0.75
0.75
0.75
ns
11
DQS write postamble time
tWPST
0.4
0.6
0.4
0.6
0.4
0.6
0.4
0.6
tCK
2
Active to Read with Auto precharge
command
tRAP
18
20
20
20
Autoprecharge write recovery +
Precharge time
tDAL
(tWR/tCK)
+
(tRP/tCK)
(tWR/tCK)
+
(tRP/tCK)
(tWR/tCK)
+
(tRP/tCK)
(tWR/tCK)
+
(tRP/tCK)
tCK
13
相關(guān)PDF資料
PDF描述
K4J52324QC 512Mbit GDDR3 SDRAM
K4J52324QC-BC14 512Mbit GDDR3 SDRAM
K4J52324QC-BC16 512Mbit GDDR3 SDRAM
K4J52324QC-BC20 512Mbit GDDR3 SDRAM
K4J52324QC-BJ12 512Mbit GDDR3 SDRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
K4H561638F-TC/LA2 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256Mb F-die DDR SDRAM Specification
K4H561638F-TC/LAA 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256Mb F-die DDR SDRAM Specification
K4H561638F-TC/LB0 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256Mb F-die DDR SDRAM Specification
K4H561638F-TC/LB3 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256Mb F-die DDR SDRAM Specification
K4H561638F-TCB3 制造商:Samsung Semiconductor 功能描述: