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參數(shù)資料
| 型號(hào)： | K4H561638E-TCA2 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Enhanced Product 10-Bit Analog-To-Digital Converters W/Serial Control & 11 Analog Inputs 20-SOIC -40 to 125 |
| 中文描述： | 128MB DDR SDRAM的 |
| 文件頁數(shù)： | 6/18頁 |
| 文件大?。?/td> | 168K |
| 代理商： | K4H561638E-TCA2 |
DDR SDRAM
DDR SDRAM 256Mb D-die (x8, x16)
Rev. 1.1 Feb. 2003
Bank Select
Timing Register
A
R
R
R
C
Data Input Register
Serial to parallel
4Mx16/ 2Mx32
4Mx16/ 2Mx32
4Mx16/ 2Mx32
4Mx16/ 2Mx32
S
2
O
I
Column Decoder
Latency & Burst Length
Programming Register
D
S
G
CK, CK
ADD
LCKE
CK, CK
CKE
CS
RAS
CAS
WE
LCAS
LRAS
LCBR
LWE
LWCBR
L
L
CK, CK
16/ 32
16/32
8/16
8 /16
x8/x16
DQi
Data Strobe
Block Diagram (8Mbx8
/
4Mbx16 I/O x 4 Banks)
(L)WE
LDM(x8)
LL(U)DM(x16)
L(U)DM(x16)
LDM(x8)
CK, CK
DM Input Register
LL(U)DM(x16)
DM(x8)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K4H561638E-TCB0 | Enhanced Product 10-Bit Analog-To-Digital Converters W/Serial Control & 11 Analog Inputs 20-SOIC -40 to 125 |
| K4H561638E-TLA0 | 10-Bit, 38 kSPS ADC Serial Out, On-Chip System Clock, Single Ch. 8-SOIC |
| K4H561638E-TLA2 | 10-Bit, 38 kSPS ADC Serial Out, On-Chip System Clock, Single Ch. 8-SOIC |
| K4H561638E-TLB0 | 128Mb DDR SDRAM |
| K4H561638F-TCC4 | 10-Bit, 38 kSPS ADC Serial Out, On-Chip System Clock, Single Ch. 8-SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K4H561638E-TCB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb DDR SDRAM |
| K4H561638E-TLA0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb DDR SDRAM |
| K4H561638E-TLA2 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb DDR SDRAM |
| K4H561638E-TLB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb DDR SDRAM |
| K4H561638F | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256Mb F-die DDR SDRAM Specification |
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