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參數(shù)資料
| 型號： | K4H510838C-TLA2 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 元件分類： | ADC |
| 英文描述： | 8-Bit, 392 kSPS ADC Parallel Out, Microprocessor Peripheral, On-Chip Track-and-Hold, Single Channels 20-SOIC |
| 中文描述： | 128MB DDR SDRAM的 |
| 文件頁數(shù)： | 3/24頁 |
| 文件大小： | 366K |
| 代理商： | K4H510838C-TLA2 |
Rev. 0.3 June. 2005
DDR SDRAM
DDR SDRAM 512Mb D-die (x8, x16)
Preliminary
Revision History
Revision
Month
Year
History
0.0
December
2004
- First version for internal review
0.1
January
2005
- Preliminary spec release
0.2
April
2005
- Added notice
0.3
June
2005
- Changed Mater format.
相關PDF資料 |
PDF描述 |
|---|---|
| K4H510838C-TLB0 | 8-Bit, 392 kSPS ADC Parallel Out, Microprocessor Peripheral, On-Chip Track-and-Hold, Single Channels 20-SOIC |
| K4H510838C-UCB0 | 8-Bit, 392 kSPS ADC Parallel Out, Microprocessor Peripheral, On-Chip Track-and-Hold, Single Channels 20-PLCC |
| K4H510838C-UCB3 | 8-Bit, 392 kSPS ADC Parallel Out, Microprocessor Peripheral, On-Chip Track-and-Hold, Single Channels 20-PLCC |
| K4H510838C-ULA2 | 8-Bit, 392 kSPS ADC Parallel Out, Microprocessor Peripheral, On-Chip Track-and-Hold, Single Channels 20-PDIP |
| K4H510838C-ULB0 | 8-Bit, 392 kSPS ADC Parallel Out, Microprocessor Peripheral, On-Chip Track-and-Hold, Single Channels 20-PDIP |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| K4H510838C-TLB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb DDR SDRAM |
| K4H510838C-UC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mb C-die DDR SDRAM Specification |
| K4H510838C-UCA2 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mb C-die DDR SDRAM Specification |
| K4H510838C-UCB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mb C-die DDR SDRAM Specification |
| K4H510838C-UCB3 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mb C-die DDR SDRAM Specification |
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