參數(shù)資料
型號： K4F641612C
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： RES, FXD, MF, CHIP, 21.5K, 1%, 1/16W, 0603
中文描述： 4米× 16位的CMOS動態(tài)隨機存儲器的快速頁面模式
文件頁數(shù)： 8/35頁
文件大?。?/td> 844K
代理商： K4F641612C
CMOS DRAM
K4F661612C,
K4F641612C
NOTES
An initial pause of 200
§á
is required after power-up followed by any 8 ROR or CBR cycles before proper device operation is
achieved.
V
IH
(min) and V
IL
(max) are reference levels for measuring timing of input signals. Transition times are measured between
V
IH
(min) and V
IL
(max) and are assumed to be 5ns for all inputs.
Measured with a load equivalent to 1 TTL load and 100pF.
Operation within the
t
RCD
(max) limit insures that
t
RAC
(max) can be met.
t
RCD
(max) is specified as a reference point only.
If
t
RCD
is greater than the specified
t
RCD
(max) limit, then access time is controlled exclusively by
t
CAC
.
Assumes that
t
RCD
≥
t
RCD
(max).
t
OFF
(min)and
t
OEZ
(max) define the time at which the output achieves the open circuit condition and are not referenced V
oh
or V
ol
.
t
WCS
,
t
RWD
,
t
CWD
and
t
AWD
are non restrictive operating parameters. They are included in the data sheet as electric charac-
teristics only. If
t
WCS
≥
t
WCS
(min), the cycles is an early write cycle and the data output will remain high impedance for the
duration of the cycle. If
t
CWD
≥
t
CWD
(min),
t
RWD
≥
t
RWD
(min) and
t
AWD
≥
t
AWD
(min), then the cycle is a read-modify-write cycle
and the data output will contain the data read from the selected address. If neither of the above conditions is satisfied, the
condition of the data out is indeterminate.
Either
t
RCH
or
t
RRH
must be satisfied for a read cycle.
These parameters are referenced to the CAS leading edge in early write cycles and to the W falling edge in read-modify-
write cycles.
Operation within the
t
RAD
(max) limit insures that
t
RAC
(max) can be met.
t
RAD
(max) is specified as a reference point only. If
t
RAD
is greater than the specified
t
RAD
(max) limit, then access time is controlled by
t
AA
.
These specifications are applied in the test mode.
In test mode read cycle, the value of
t
RAC
,
t
AA
,
t
CAC
is delayed by 2ns to 5ns for the specified values. These parameters
should be specified in test mode cycles by adding the above value to the specified value in this data sheet.
5.
6.
7.
8.
9.
10.
11.
12.
1.
2.
3.
4.
K4F64(6)1612C Truth Table
RAS
LCAS
UCAS
W
OE
DQ0 - DQ7
DQ8-DQ15
STATE
H
X
X
X
X
Hi-Z
Hi-Z
Standby
L
H
H
X
X
Hi-Z
Hi-Z
Refresh
L
L
H
H
L
DQ-OUT
Hi-Z
Byte Read
L
H
L
H
L
Hi-Z
DQ-OUT
Byte Read
L
L
L
H
L
DQ-OUT
DQ-OUT
Word Read
L
L
H
L
H
DQ-IN
-
Byte Write
L
H
L
L
H
-
DQ-IN
Byte Write
L
L
L
L
H
DQ-IN
DQ-IN
Word Write
L
L
L
H
H
Hi-Z
Hi-Z
-
相關(guān)PDF資料
PDF描述
K4F661612C 4M x 16bit CMOS Dynamic RAM with Fast Page Mode
K4F641612D 4M X 16BIT CMOS DYNAMIC RAM WITH FAST PAGE MODE
K4F641612D-TI 4M X 16BIT CMOS DYNAMIC RAM WITH FAST PAGE MODE
K4F641612D-TP 4M X 16BIT CMOS DYNAMIC RAM WITH FAST PAGE MODE
K4F661612D 4M X 16BIT CMOS DYNAMIC RAM WITH FAST PAGE MODE
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
K4F641612C-L 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 16bit CMOS Dynamic RAM with Fast Page Mode
K4F641612C-TC 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 16bit CMOS Dynamic RAM with Fast Page Mode
K4F641612C-TL50 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 16bit CMOS Dynamic RAM with Fast Page Mode
K4F641612D 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M X 16BIT CMOS DYNAMIC RAM WITH FAST PAGE MODE
K4F641612D-TI 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M X 16BIT CMOS DYNAMIC RAM WITH FAST PAGE MODE
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*