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參數(shù)資料
| 型號(hào)： | K4D26323RA-GC |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL |
| 中文描述： | 100萬x 32Bit的× 4銀行雙數(shù)據(jù)速率同步RAM的雙向數(shù)據(jù)選通和DLL |
| 文件頁數(shù)： | 10/18頁 |
| 文件大?。?/td> | 315K |
| 代理商： | K4D26323RA-GC |
128M GDDR SDRAM
K4D26323QG-GC
- 10 -
Rev 1.2(Mar. 2005)
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
Note :
POWER & DC OPERATING CONDITIONS(SSTL In/Out)
Recommended operating conditions(Voltage referenced to V
SS
=0V, T
A
=0 to 65
°
C)
Parameter
Symbol
Min
Typ
Max
Unit
Note
Device Supply voltage
V
DD
1.7
1.8
1.9
V
1,8
Output Supply voltage
V
DDQ
1.7
1.8
1.9
V
1,8
Reference voltage
V
REF
0.49*V
DDQ
-
0.51*V
DDQ
V
2
Termination voltage
Vtt
V
REF
-0.04
V
REF
V
REF
+0.04
V
3
Input logic high voltage
V
IH(DC)
V
REF
+0.15
-
V
DDQ
+0.30
V
4
Input logic low voltage
V
IL(DC)
-0.30
-
V
REF
-0.15
V
5
Output logic high voltage
V
OH
Vtt+0.76
-
-
V
I
OH
=-15.2mA, 7
Output logic low voltage
V
OL
-
-
Vtt-0.76
V
I
OL
=+15.2mA, 7
Input leakage current
I
IL
-5
-
5
uA
6
Output leakage current
I
OL
-5
-
5
uA
6
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
Voltage on any pin relative to Vss
V
IN
, V
OUT
-0.5 ~ 3.6
V
Voltage on V
DD
supply relative to Vss
V
DD
-1.0 ~ 3.6
V
Voltage on V
DD
supply relative to Vss
V
DDQ
-0.5 ~ 3.6
V
Storage temperature
T
STG
-55 ~ +150
°
C
Power dissipation
P
D
3.3
W
Short circuit current
I
OS
50
mA
1. Under all conditions VDDQ must be less than or equal to VDD.
2. VREF is expected to equal 0.50*VDDQ of the transmitting device and to track variations in the DC level of the same. Peak to
peak noise on the VREF may not exceed + 2% of the DC value.
3. Vtt of the transmitting device must track VREF of the receiving device.
4. VIH(max.)= VDDQ +1.5V for a pulse width and it can not be greater than 1/3 of the cycle rate.
5. VIL(mim.)= -1.5V for a pulse width and it can not be greater than 1/3 of the cycle rate.
6. For any pin under test input of 0V < VIN < VDD is acceptable. For all other pins that are not under test VIN=0V.
7. Output logic high voltage and low voltage is depend on output channel condition.
8. For K4D26323QG-G(V)C22, VDD&VDDQ=2.0V+0.1V
Note :
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K4D26323RA-GC2A | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL |
| K4D26323RA-GC33 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL |
| K4D26323RA-GC36 | 制造商:Samsung Semiconductor 功能描述: |
| K4D28163HD | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mbit DDR SDRAM |
| K4D28163HD-TC36 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mbit DDR SDRAM |
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