參數(shù)資料
型號: K4B1G0446C-CF8
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 1Gb C-die DDR3 SDRAM Specification
中文描述: 1Gb的?芯片的DDR3 SDRAM規(guī)范
文件頁數(shù): 36/63頁
文件大小: 1255K
代理商: K4B1G0446C-CF8
Page 36 of 63
Rev. 1.0 June 2007
1Gb DDR3 SDRAM
K4B1G04(08/16)46C
[ Table36 ] IDD Measurement Conditions for IDD3N and IDD3P(fast exit)
Note :
1. DDR3 will offer only ONE active power down mode with DLL on (-> fast exit). MRS bit 12 will not be used for active power down. Instead bit A12 will be used to switch
between two different precharge power down modes.
Current
IDD3N
IDD3P
Name
Active Standby Current
Active Power-Down Current
a
Always Fast Exit
Measurement Condition
Timing Diagram Example
Figure 2
CKE
HIGH
LOW
External Clock
on
on
t
CK
t
CKmin
(IDD)
t
CKmin
(IDD)
t
RC
n.a.
n.a.
t
RAS
n.a.
n.a.
t
RCD
n.a.
n.a.
t
RRD
n.a.
n.a.
CL
n.a.
n.a.
AL
n.a.
n.a.
CS
HIGH
STABLE
Addr. and cmd Inputs
SWITCHING as described in Table 2
STABLE
Data inputs
SWITCHING as described in Table 3
FLOATING
Output Buffer DQ,DQS / MR1 bit A12
off / 1
off / 1
Rtt_NOM, Rtt_WE
disabled
disabled
Burst length
n.a.
n.a.
Active banks
all
all
Idle banks
none
none
Precharge Power
Down Mode / Mode Register Bit
a
n.a.
n.a. (Active Power Down
Mode is always "Fast Exit" with DLL on
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