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參數(shù)資料
| 型號： | K1B6416B6C |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 4Mx16 bit Synchronous Burst Uni-Transistor Random Access Memory |
| 中文描述： | 4Mx16位同步突發(fā)統(tǒng)一晶體管隨機(jī)存取存儲器 |
| 文件頁數(shù)： | 39/46頁 |
| 文件大小： | 768K |
| 代理商： | K1B6416B6C |
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Revision 1.0
January 2005
K1B6416B6C
- 39 -
U
t
RAM
Fig.33 TIMING WAVEFORM OF BURST READ SUSPEND CYCLE(1)
[Latency=5,Burst Length=4,WP=Low enable]
(WE=V
IH
, MRS=V
IH
)
1
2
3
4
5
6
7
8
9
10
11
ADV
Address
CS
LB, UB
Data out
OE
CLK
DQ0
DQ1
DQ2
Undefined
t
CD
Valid
Latency 5
t
HZ
t
ADVS
t
ADVH
t
AS(B)
t
AH(B)
t
CSS(B)
T
Don’t Care
SYNCHRONOUS BURST READ SUSPEND TIMING WAVEFORM
(SYNCHRONOUS BURST READ SUSPEND CYCLE)
1. If clock input is halted during burst read operation, the data out will be suspended. During the burst read suspend period, OE high
drives data out to high-Z. If clock input is resumed, the suspended data will be out first.
2. /WAIT Low(tWL or tAWL) : Data not available(driven by CS low going edge or ADV low going edge)
/WAIT High(tWH) : Data available(driven by Latency-1 clock)
/WAIT High-Z(tWZ) : Data don’t care(driven by CS high going edge)
3. During suspend period, OE high drives DQ to High-Z and OE low drives DQ to Low-Z.
If OE stays low during suspend period, the previous data will be sustained.
4. Burst Cycle Time(tBC) should not be over 2.5
μ
s.
WAIT
t
BLZ
t
BEL
t
OEL
t
OLZ
High-Z
0
t
WH
t
WL
DQ1
t
WZ
t
OHZ
t
OLZ
DQ3
High-Z
～
t
BC
Table 37. BURST READ SUSPEND AC CHARACTERISTICS
Symbol
Speed
Units
Symbol
Speed
Units
Min
Max
Min
Max
t
BEL
t
OEL
t
BLZ
t
OLZ
t
CD
t
OH
1
1
5
5
-
3
-
-
-
-
clock
clock
ns
ns
ns
ns
t
HZ
t
OHZ
t
WL
t
WH
t
WZ
-
-
-
-
-
12
12
10
12
12
ns
ns
ns
ns
ns
10
-
t
OH
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