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參數(shù)資料
| 型號： | K1B6416B6C |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 4Mx16 bit Synchronous Burst Uni-Transistor Random Access Memory |
| 中文描述： | 4Mx16位同步突發(fā)統(tǒng)一晶體管隨機存取存儲器 |
| 文件頁數(shù)： | 30/46頁 |
| 文件大小： | 768K |
| 代理商： | K1B6416B6C |
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Revision 1.0
January 2005
K1B6416B6C
- 30 -
U
t
RAM
Table 28. SYNCHRONOUS AC CHARACTERISTICS
(V
CC
=1.7~2.0V, T
A
=-40 to 85
°
C, Maximum Main Clock Fre-
quency=66MHz)
Parameter List
Symbol
Speed
Units
Min
Max
Burst
Operation
(Common)
Clock Cycle Time
Burst Cycle Time
Address Set-up Time to ADV Falling(Burst)
T
15
-
0
200
2500
-
ns
ns
ns
t
BC
t
AS(B)
Address Hold Time from ADV Rising(Burst)
ADV Setup Time
ADV Hold Time
CS Setup Time to Clock Rising(Burst)
Burst End to New ADV Falling
Burst Stop to New ADV Falling
CS Low Hold Time from Clock
CS High Pulse Width
ADV High Pulse Width
Chip Select to WAIT Low
ADV Falling to WAIT Low
Clock to WAIT High
Chip De-select to WAIT High-Z
UB, LB Enable to End of Latency Clock
Output Enable to End of Latency Clock
UB, LB Valid to Low-Z Output
Output Enable to Low-Z Output
Latency Clock Rising Edge to Data Output
t
AH(B)
t
ADVS
t
ADVH
t
CSS(B)
t
BEADV
t
BSADV
t
CSLH
t
CSHP
t
ADHP
t
WL
t
AWL
t
WH
t
WZ
t
BEL
t
OEL
t
BLZ
t
OLZ
t
CD
7
5
7
5
7
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
12
7
5
5
-
-
-
-
1
1
5
5
-
10
10
12
12
-
-
-
-
10
Burst Read
Operation
Clock
Clock
ns
ns
ns
Output Hold
Burst End Clock to Output High-Z
Chip De-select to Output High-Z
Output Disable to Output High-Z
UB, LB Disable to Output High-Z
WE Set-up Time to Command Clock
WE Hold Time from Command Clock
WE High Pulse Width
UB, LB Set-up Time to Clock
UB, LB Hold Time from Clock
Byte Masking Set-up Time to Clock
Byte Masking Hold Time from Clock
Data Set-up Time to Clock
Data Hold Time from Clock
t
OH
t
HZ
t
CHZ
t
OHZ
t
BHZ
t
WES
t
WEH
t
WHP
t
BS
t
BH
t
BMS
t
BMH
t
DS
t
DHC
3
-
-
-
-
5
5
5
5
5
7
7
5
3
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
12
12
12
12
-
-
-
-
-
-
-
-
-
Burst Write
Operation
AC OPERATING CONDITIONS
TEST CONDITIONS
(Test Load and Test Input/Output Reference)
Input pulse level: 0.2 to V
CC
-0.2V
Input rising and falling time: 3ns
Input and output reference voltage: 0.5 x V
CC
Output load: C
L
=30pF
Vtt=0.5 x VCC
50
Dout
30pF
Z0=50
Figure 24. AC Output Load Circuit
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