參數(shù)資料
型號(hào)： IXF440
英文描述： LAN HUB CONTROLLER
中文描述： 局域網(wǎng)集線器控制器
文件頁數(shù)： 23/100頁
文件大?。?/td> 1354K
代理商： IXF440
IXF440 Multiport 10/100 Mbps Ethernet Controller
Datasheet
23
3.2.2
Base Registers
The following sections describe the individual base registers.
3.2.2.1
Chip Interrupt Summary Register
This register handles the interrupt status of all the ports. A set bit indicates that the corresponding
port has generated an interrupt, and several bits located in its Interrupt Status Register have been
set. A bit will reset when the corresponding interrupts have been cleared. The interrupt summary
register is valid only in port 0.
Bit Name
Bit Number
Bit Description
INT7
7
Port 7 interrupt
INT6
6
Port 6 interrupt
INT5
5
Port 5 interrupt
INT4
4
Port 4 interrupt
INT3
3
Port 3 interrupt
INT2
2
Port 2 interrupt
INT1
1
Port 1 interrupt
INT0
0
Port 0 interrupt
Access Rules
Register access
R
Value after reset
00H
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