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參數(shù)資料
| 型號： | IR3093MTR |
| 廠商： | International Rectifier |
| 英文描述： | 3 PHASE OPTERON, ATHLON, OR VR10.X CONTROL IC |
| 中文描述： | 3相皓龍，速龍，或控制IC的VR10.X |
| 文件頁數(shù)： | 16/39頁 |
| 文件大小： | 693K |
| 代理商： | IR3093MTR |
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IR3093
Page 16 of 39
07/15/04
APPLICATIONS INFORMATION
C5VREF
VIN
CSC3
RSC3
48LD MLPQ
IR3093
U13
IR3093
B
C
V
C
C
E
PGND1
PGND2
V5VUVL
GATEL2
L
OCSET
FB
O
P
ROSC
EAOUT
S
V
V
V
V
V
VID3
V
G
PGND3
V
C
5
O
C
C
N
CCS3
RCS3
CBST3
1
2
VIN
Csense-
VIN
ROCSET
RFB
RSET
CVCC
CBIAS
CCS2
RCS2
RCOMP
RCS1
CCS1
CSS
RROSC
CBST2
1
2
1
2
COUT
CSC2
CIN
RDRP
CDAC
CCOMP
RSC2
RDAC
CBST1
VOUT-
VOUT+
POWERGOOD
GNDIN
VIN
VOUT SENSE-
VOUT SENSE+
VID5
OVP
ENABLE
VIN
Figure 6
– System Diagram
VID Control
The IR3093 provides three different microprocessor solutions. The VID_SEL pin selects the appropriate Digital-to-
Analog Converters (DAC), VID threshold voltages, and Over Voltage Protection (OVP) threshold for either VR-10.0,
OPTERON, or ATHLON solutions. Reference voltages are shown in Table 1. The DAC output voltage is available
at the VDAC pin. A detailed block diagram of the VID control circuitry can be found in Figure 7. The VID pins are
internally pulled up to 4.9V by 18uA current sources. The VID input comparators have a 0.6V threshold for VR-10.0
or 1.65V threshold for OPTERON and ATHLON. The selected DAC voltage is provided at the Error Amplifier
positive input and to the VDAC pin by the trans-conductance DAC Buffer.
The VDAC voltage is trimmed to the Error Amplifier output voltage with EAOUT tied to FB via an accurate resistor.
This compensates DAC Buffer input offset, Error Amplifier input offset, and errors in the generation of the FB bias
current which is based on R
ROSC
. This trim method provides a 0.5% system
accuracy.
The IR3093 can accept changes in the VID code while operating and vary the VDAC voltage accordingly. The
IR3093 detects a VID change and blanks the DAC output response for 400ns to verify the new code is valid and not
due to skew or noise. The sink/source capability of the VDAC buffer amp is programmed by the same external
resistor that sets the oscillator frequency, R
ROSC
. The slew rate of the voltage at the VDAC pin can be adjusted by an
external capacitor between VDAC pin and the VOSNS- pin. A resistor connected in series with this capacitor is
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