參數(shù)資料
型號: IR3092
廠商: International Rectifier
英文描述: 2 PHASE OPTERON, ATHLON, OR VR10.X CONTROL IC
中文描述: 2相皓龍,速龍,或控制IC的VR10.X
文件頁數(shù): 15/37頁
文件大?。?/td> 619K
代理商: IR3092
IR3092
Page 15 of 37
06/25/04
APPLICATIONS INFORMATION
Figure 6
– System Diagram
VID Control
The IR3092 provides three different microprocessor solutions. The VID_SEL pin selects the appropriate Digital-to-Analog
Converters (DAC), VID threshold voltages, and Over Voltage Protection (OVP) threshold for VR10.X, OPTERON, or
ATHLON solutions. AMD VID codes are shown in Table 1; Intel VID codes are found in Table 2. The DAC output voltage
is available at the VDAC pin. A detailed block diagram of the VID control circuitry can be found in Figure 7. The VID pins
are internally pulled up to 4.9V by 18uA current sources. The VID input comparators have a 0.6V threshold for VR10.X or
1.5V threshold for OPTERON and ATHLON. The selected DAC voltage is provided at the Error Amplifier positive input
and to the VDAC pin by the trans-conductance DAC Buffer.
The VDAC voltage is trimmed to the Error Amplifier output voltage with EAOUT tied to FB via an accurate resistor. This
compensates DAC Buffer input offset, Error Amplifier input offset, and errors in the generation of the FB bias current
which is based on R
ROSC
. This trim method provides 0.5% system
accuracy.
The IR3092 can accept changes in the VID code while operating and vary the VDAC voltage accordingly. The IR3092
detects a VID change and blanks the DAC output response for 400ns to verify the new code is valid and not due to skew
or noise. The sink/source capability of the VDAC buffer amp is programmed by the same external resistor that sets the
oscillator frequency, R
ROSC
. The slew rate of the voltage at the VDAC pin can be adjusted by an external capacitor
between VDAC pin and the VOSNS- pin. A resistor connected in series with this capacitor is required to compensate the
VDAC buffer amplifier. Digital VID transitions result in a smooth analog transition of the VDAC voltage and converter
output voltage minimizing inrush currents in the input and output capacitors and overshoot of the output voltage.
VIN
VIN
48LD MLPQ
IR3092
B
C
V
C
C
E
PGND1
PGND2
GVCCL
5VUVL
L
OCSET
FB
O
P
ROSC
EAOUT
S
V
V
V
V
V
VID3
V
N
N
N
NC
N
N
N
N
N
VIN
ROCSET
RFB
RSET
CVCC
CBIAS
CCS2
RCS2
RCOMP
RCS1
CCS1
CSS
RROSC
CBST2
1
2
1
2
COUT
CSC2
CIN
RDRP
CDAC
CCOMP
RSC2
RDAC
CBST1
VOUT-
VOUT+
POWERGOOD
GNDIN
VIN
VOUT SENSE-
VOUT SENSE+
VID5
OVP
ENABLE
Csense-
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