參數(shù)資料
型號: IDT8535-01PGI
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: LOW SKEW, 1-TO-4 LVCMOS-TO-3.3V LVPECL FANOUT BUFFER
中文描述: 8535 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 4 INVERTED OUTPUT(S), PDSO20
封裝: TSSOP-16
文件頁數(shù): 9/11頁
文件大?。?/td> 85K
代理商: IDT8535-01PGI
9
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT8535-01
LOW SKEW, 1-TO-4 LVCMOS-TO-3.3V LVPECL
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the IDT8535-01. Equations and example calculations are also provided.
POWER DISSIPATION:
The total power dissipation for the IDT8535-01 is the sumof the core power plus the power dissipated in the load(s). The following is the power dissipation
for the V
DD
= 3.3V + 5% = 3.465V, which gives worst case results. Please refer to the following section,
Calculations and Equations
, for details on calculating
power dissipated in the load.
Power (core)
MAX
= V
DD
_
MAX
*I
CC
_
MAX
= 3.465 *50mA = 173.25mW
Power (outputs)
MAX
= 30.2mW/Loaded Output Pair
If all outputs are loaded, the total power is 4 *30.2mW = 120.8Mw
Total Power_
MAX
(3.465V, with all outputs switching) = 173.25mW + 120.8mW = 294.05mW
JUNCTION TEMPERATURE:
Junction temperature (t
J
) is the temperature at the junction of the bond wire and bond pad. It directly affects the reliability of the device. The maximum
recommended junction temperature for this device is 125°C.
The equation for is as follows: t
J
=
θ
JA
*Pd_total + T
A
t
J
= Junction Temperature
θ
JA
= Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in
Power Dissipation
, above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance (
θ
JA
) must be used. Assumng a moderate air flow of 200
linear feet per mnute and a multi-layer board, the appropriate value is 77.6°C/W per the following
Thermal Resistance
table. Therefore, t
J
for an ambient
temperature of 70°C with all its outputs switching is:
70°C + 0.294W *77.6°C/W = 92.81°C. This is well below the limt of 125°C.
This calculation is only an example. t
J
will obviously vary depending on the number of loaded outputs, supply voltage, air flow, and the type of board (single-
layer or multi-layer).
THERMAL RESISTANCE
θ
JA
for 20-pin TSSOP, forced convenction
θ
JA
by Velocity (Linear Feet per mInute)
0
200
77.6
400
70.9
Unit
°C/W
Multi-Layer PCB, JEDEC Standard Test boards
92.6
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