參數(shù)資料
型號(hào)： IDT821054PQF
廠商： IDT, Integrated Device Technology Inc
文件頁(yè)數(shù)： 3/45頁(yè)
文件大小： 0K
描述： IC PCM CODEC QUAD MPI 64-PQFP
標(biāo)準(zhǔn)包裝： 84
類型： PCM 編解碼器/濾波器
數(shù)據(jù)接口： PCM 音頻接口
ADC / DAC 數(shù)量： 4 / 4
三角積分調(diào)變： 無(wú)
電壓 - 電源，模擬： 4.75 V ~ 5.25 V
電壓 - 電源，數(shù)字： 4.75 V ~ 5.25 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-QFP
供應(yīng)商設(shè)備封裝： 64-PQFP（14x14）
包裝： 管件
其它名稱： 821054PQF
11
IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE
INDUSTRIAL TEMPERATURE RANGE
2.2
DSP PROGRAMMING
2.2.1
SIGNAL PROCESSING
Several blocks are programmable for signal processing. This allows
users to optimize the performance of the IDT821054 for the system.
Figure - 4 shows the signal flow for each channel and indicates the
programmable blocks.
The programmable digital filters are used to adjust gain and
impedance, balance transhybrid and correct frequency response. All the
coefficients of the digital filters can be calculated automatically by a
software provided by IDT. When users provide accurate SLIC model,
impedance and gain requirements, this software will calculate all the
coefficients automatically. After loading these coefficients to the
coefficient RAM of the IDT821054, the final AC characteristics of the line
card (consists of SLIC and CODEC) will meet the ITU-T specifications.
Figure - 4 Signal Flow for Each Channel
Abbreviation List:
LPF/AA: Anti-Alias Low-pass Filter
LPF/SC: Smoothing Low-pass Filter
LPF: Low-pass Filter
HPF: High-pass Filter
GIS: Gain for Impedance Scaling
D1: 1st Down Sample Stage
D2: 2nd Down Sample Stage
U1: 1st Up Sample Stage
U2: 2nd Up Sample Stage
UF: Up Sampling Filter (64 k - 128 k)
IMF: Impedance Matching Filter
ECF: Echo Cancellation Filter
GTX: Gain for Transmit Path
GRX: Gain for Receive Path
FRX: Frequency Response Correction for Transmit
FRR: Frequency Response Correction for Receive
CMP: Compression
EXP: Expansion
TSA: Time Slot Assignment
2.2.2
GAIN ADJUSTMENT
The analog gain and digital gain of each channel can be adjusted
separately in the IDT821054.
For each individual channel, the analog A/D gain in the transmit path
can be selected as 0 dB or 6 dB. The selection is done by the GAD bit in
LREG9. It is 0 dB by default.
For each individual channel, the analog D/A gain in the receive path
can be selected as 0 dB or -6 dB. The selection is done by the GDA bit
in LREG9. It is 0 dB by default.
For each individual channel, the digital gain in the transmit path
(GTX) is programmable from -3 dB to +12 dB with minimum 0.1 dB step.
If the CS[5] bit in local register LREG1 is ‘0’, the GTX filter is disabled. If
the CS[5] bit is ‘1’, the GTX is programmed by the coefficient RAM.
For each individual channel, the digital gain in the receive path
(GRX) is programmable from -12 dB to +3 dB with minimum 0.1 dB step.
If the CS[7] bit in LREG1 is ‘0’, the GRX filter is disabled. If the CS[7] bit
is ‘1’, the GRX is programmed by the coefficient RAM.
2.2.3
IMPEDANCE MATCHING
The IDT821054 provides a programmable feedback path from VIN to
VOUT for each channel. This feedback synthesizes the two-wire
impedance of the SLIC. The programmable Impedance Matching Filter
(IMF) and Gain of Impedance Scaling filter (GIS) work together to realize
impedance matching. If the CS[0] bit in LREG1 is ‘0’, the IMF is
disabled. If the CS[0] bit is ‘1’, the IMF coefficient is programmed by the
coefficient RAM. If the CS[2] bit in LREG1 is ‘0’, the GIS filter is disabled.
If the CS[2] bit is ‘1’, the GIS coefficient is programmed by the coefficient
RAM.
LPF/AA
GTX
D2
LPF
FRX
HPF
CMP
TSA
LPF/SC
∑
U1
GRX
U2
LPF
FRR
Dual
Tone
EXP
TSA
UF
∑
GIS
Level Meter
IMF
ECF
D
LB-
ANA
ALB-
8K
DLB-
8K
DLB
-PC
M
ALB-
DI
DL
B-DI
Receive Path
Transmit Path
VIN
VOUT
Analog
@2 MHz
D1
@64 KHz
@16 KHz
@8 KHz
TS
PCM Highway
DX1/DX2
DR1/DR2
LREG1: CS[2]
CS[2] = 1: enable (normal)
CS[2] = 0: disable (cut)
LREG1: CS[0]
CS[0] = 1: enable (normal)
CS[0] = 0: disable (cut)
LREG1: CS[1]
CS[1] = 1: enable (normal)
CS[1] = 0: disable (cut)
Bold Black Framed: Programmable Filters
Fine Black Framed: Fixed Filters
LREG1: CS[3]
CS[3] = 1: enable (normal)
CS[3] = 0: disable (bypass)
CUT-OFF-PCM
ALB-
1BIT
DLB_1BI
T
FSK
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT821054PQFG 功能描述:IC PCM CODEC QUAD MPI 64-PQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR)
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