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參數(shù)資料
| 型號： | IDT74LVC574APY8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 封裝： | SSOP-20 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 61K |
| 代理商： | IDT74LVC574APY8 |
INDUSTRIALTEMPERATURERANGE
IDT74LVC574A
3.3VCMOSOCTALEDGE-TRIGGEREDD-TYPEFLIP-FLOP
1
MAY 1999
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
1999 Integrated Device Technology, Inc.
DSC-4679/1
FEATURES:
0.5 MICRON CMOS Technology
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
CMOS power levels (0.4
W typ. static)
Rail-to-rail output swing for increased noise margin
All inputs, outputs, and I/O are 5V tolerant
Supports hot insertion
Available in SOIC, SSOP, QSOP, and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
DRIVE FEATURES:
High Output Drivers: ±24mA
Reduced system switching noise
IDT74LVC574A
DESCRIPTION:
The LVC574A octal edge-triggered D-type flip-flop is built using ad-
vanced dual-metal CMOS technology. The device features 3-state outputs
designed specifically for driving highly capacitive or relatively low-imped-
ance loads. The LVC574A is particularly suitable for implementing buffer
registers, input-output (I/O) ports, bidirectional bus drivers, and working
registers.
On the positive transition of the clock (CLK) input, the Q outputs are set
to the logic levels at the data (D) inputs.
Abufferedoutput-enable(OE)inputcanbeusedtoplacetheeightoutputs
in either a normal logic state (high or low logic levels) or a high-impedance
state.Inthehigh-impedancestate,theoutputsneitherloadnordrivethebus
linessignificantly. OE doesnotaffecttheinternaloperationsoftheflip-flops.
Old data can be retained or new data can be entered while the outputs are
in the high-impedance state.
The LVC574A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
theuseofthisdeviceasatranslatorinamixed3.3V/5Vsystemenvironment.
3.3V CMOS OCTAL
EDGE-TRIGGERED D-TYPE FLIP-
FLOP WITH 3-STATE OUTPUTS
AND 5 VOLT TOLERANT I/O
OE
C1
CLK
1
D
TO SEVEN OTHER CHANNELS
1
11
2
19
1
D
1
Q
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| IDT74LVC827APY | 制造商:Integrated Device Technology Inc 功能描述: |
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| IDT74LVCC3245APGG | 功能描述:IC BUS TRANSCVR 3-ST 8B 24TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 變換器 系列:74LVCC 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:100 系列:- 邏輯功能:變換器，雙向 位數(shù):2 輸入類型:CMOS 輸出類型:CMOS 數(shù)據(jù)速率:16Mbps 通道數(shù):2 輸出/通道數(shù)目:1 差分 - 輸入:輸出:無/無 傳輸延遲（最大）:15ns 電源電壓:1.65 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:10-UFQFN 供應商設備封裝:10-UTQFN（1.4x1.8） 包裝:管件 |
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