參數(shù)資料
型號(hào): ICS951402YGLF-T
英文描述: Programmable Timing Control Hub for P4 processor
中文描述: 可編程定時(shí)控制中心的P4處理器
文件頁(yè)數(shù): 23/23頁(yè)
文件大?。?/td> 303K
代理商: ICS951402YGLF-T
23
Integrated
Circuit
Systems, Inc.
ICS951402
Advance Information
0660—05/05/05
AREA
INDEX
1 2
N
D
h x 45°
E1
E
α
PLANE
SEATING
A1
A
e
- C -
b
.10 (.004)
C
c
L
MIN
2.41
0.20
0.20
0.13
SEE VARIATIONS
MAX
2.80
0.40
0.34
0.25
MIN
.095
.008
.008
.005
SEE VARIATIONS
MAX
.110
.016
.0135
.010
A
A1
b
c
D
E
E1
e
h
L
N
a
10.03
7.40
10.68
7.60
.395
.291
.420
.299
0.38
0.50
SEE VARIATIONS
0.64
1.02
.015
.020
.025
.040
VARIATIONS
MIN
15.75
MAX
16.00
MIN
.620
MAX
.630
48
10-0034
0.635 BASIC
0.025 BASIC
COMMON DIMENSIONS
In Millimeters
In Inches
COMMON DIMENSIONS
Reference Doc.: JEDEC Publication 95, MO-118
300 mil SSOP
N
SEE VARIATIONS
D mm.
D (inch)
SYMBOL
Ordering Information
ICS951402
y
FLF-T
Example:
ICS XXXX
y
F LF- T
Designation for tape and reel packaging
Annealed Lead Free (Optional)
Package Type
F = SSOP
Revision Designator
(will not correlate with datasheet revision)
Device Type
Prefix
ICS = Standard Device
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