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參數(shù)資料
| 型號(hào)： | ICS9248-199 |
| 英文描述： | Frequency Generator for SIS 735/740 with AMD K7 Processor |
| 中文描述： | 頻率發(fā)生器與AMD k7的處理器為SIS的740分之735 |
| 文件頁(yè)數(shù)： | 19/21頁(yè) |
| 文件大小： | 181K |
| 代理商： | ICS9248-199 |
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ICS9248-199
0376E—12/23/02
SDRAM_STOP# Timing Diagram
SDRAM_STOP# is an asychronous input to the clock synthesizer. It is used to stop SDRAM clocks for low power
operation. SDRAM_STOP# is synchronized to complete it's current cycle, by the
ICS9248-199
. All other clocks will
continue to run while the SDRAM clocks are disabled. The SDRAM clocks will always be stopped in a low state and
start in such a manner that guarantees the high pulse width is a full pulse.
Notes:
1. All timing is referenced to the internal CPU clock.
2. SDRAM is an asynchronous input and metastable conditions may exist. This signal is
synchronized to the SDRAM clocks inside the ICS9248-199.
3. All other clocks continue to run undisturbed.
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