參數(shù)資料
型號(hào): ICS8430AY-111T
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: PLL BASED CLOCK DRIVER, PQFP32
封裝: 7 X 7 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, MS-026, LQFP-32
文件頁(yè)數(shù): 1/8頁(yè)
文件大小: 105K
代理商: ICS8430AY-111T
8430-111
www.icst.com
REV. A FEBRUARY 15, 2001
1
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS8430-111
700MHZ, LOW JITTER
LVPECL FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
The ICS8430-111 is a general purpose, dual out-
put high frequency synthesizer and a member
of the HiPerClockS family of High Performance
Clocks Solutions from ICS. The VCO operates
at a frequency range of 250MHz to 700MHz. With
the output configured to divide the VCO frequency by 2 out-
put frequency steps as small as 1MHz can be achieved us-
ing a 16MHz differential or single ended reference clock.
Output frequencies up to 700MHz can be programmed using
the serial or parallel interfaces to the configuration logic. The
low jitter and frequency range of the ICS8430-111 makes it
an ideal clock generator for most clock tree applications.
BLOCK DIAGRAM
PIN ASSIGNMENT
FEATURES
Fully integrated PLL
14MHz to 25 MHz differential input or reference input
frequency
Accepts any differential input signal (PECL, HSTL, LVDS,
SSTL, etc.)
Dual differential 3.3V LVPECL output
15.63MHz to 700MHz output frequency
2.6ps rms output jitter
Parallel interface for programming counter and output
dividers
Serial 3 wire interface
Selectable differential input interface and LVCMOS
reference input
LVCMOS control inputs
3.3V supply voltage
32 lead low-profile QFP(LQFP), 7mm x 7mm x 1.4mm
package body, 0.8mm package lead pitch
0°C to 70°C ambient operating temperature
32 31 30 29 28 27 26 25
9
10 11 12 13 14 15 16
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
CLK
REF_CLK
CLK_SEL
VDDA
S_LOAD
S_DATA
S_CLOCK
MR
M5
M6
M7
M8
N0
N1
N2
VEE
nFOUT0
FOUT0
VDDO
nFOUT1
FOUT1
VDD
TEST
nCLK
nP_LOAD
VCO_SEL
M0
M1
M2
M3
M4
32-Lead LQFP
Y Package
Top View
VCO_SEL
CLK_SEL
REF_CLK
CLK
S_LOAD
S_DATA
S_CLOCK
nP_LOAD
M0:M8
N0:N2
VCO
PLL
FOUT0
nFOUT0
FOUT1
nFOUT1
TEST
÷ N
CONFIGURATION
INTERFACE
LOGIC
÷ M
0
1
0
1
÷ 16
PHASE DETECTOR
ICS8430-111
÷ 2
HiPerClockS
,&6
nCLK
MR
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
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