參數(shù)資料
型號(hào): M74HC541M1R
廠商: 意法半導(dǎo)體
英文描述: OCTAL BUS BUFFER WITH 3 STATE OUTPUTS HC540: INVERTED - HC541 NON INVERTED
中文描述: 八路總線緩沖器與三態(tài)輸出HC540:倒立- HC541非反相
文件頁(yè)數(shù): 1/12頁(yè)
文件大?。?/td> 266K
代理商: M74HC541M1R
M54HC540/541
M74HC540/541
October 1993
HC540: INVERTED - HC541 NON INVERTED
OCTAL BUS BUFFERWITH3 STATE OUTPUTS
B1R
(Plastic Package)
ORDER CODES :
M54HCXXXF1R
M74HCXXXB1R
M74HCXXXM1R
M74HCXXXC1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTION
(top view)
.
HIGH SPEED
t
PD
= 10 ns(TYP.) at V
CC
= 5V
.
LOWPOWER DISSIPATION
I
CC
= 4
μ
A(MAX.) at T
A
= 25
o
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
INL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
15 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
| = I
OL
= 6 mA (MIN)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2V to 6V
.
PIN ANDFUNCTION COMPATIBLE
WITH 54/74LS540/541
DESCRIPTION
The M54/74HC540 and HC541 are high speed
CMOS
OCTAL
BUS
fabricated in silicon gate C
2
MOS technology. They
have the same high speed performance of LSTTL
combined withtrue CMOS lowpower consumption.
TheHC540isaninvertingbufferandHC541isa non
inverting buffer.
The 3 STATE control gate operates as a two input
AND such that ifeither G1 and G2 are high,all eight
output are in the high impedance state. In order to
BUFFERS
(3-STATE)
enhance PC board layout, the HC540 and HC541
offers a pinout having inputs and outputs on
opposite sides of thepackage.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
HC541
HC540
1/12
相關(guān)PDF資料
PDF描述
M74HC541TTR OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (NON INVERTED)
M74HC541F1R OCTAL BUS BUFFER WITH 3 STATE OUTPUTS HC540: INVERTED - HC541 NON INVERTED
M74HC541C1R OCTAL BUS BUFFER WITH 3 STATE OUTPUTS HC540: INVERTED - HC541 NON INVERTED
M74HC563F1R OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HC563 INVERTING - HC573 NON INVERTING
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M74HC563B1R 制造商:STMicroelectronics 功能描述:IC 74HC CMOS 74HC563 DIP20 6V
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