參數(shù)資料
型號(hào)： HY5PS1G431CFP-E3
廠商： HYNIX SEMICONDUCTOR INC
元件分類： DRAM
英文描述： 1Gb DDR2 SDRAM
中文描述： 256M X 4 DDR DRAM, 0.6 ns, PBGA60
封裝： ROHS COMPLIANT, FBGA-60
文件頁數(shù)： 13/37頁
文件大?。?/td> 539K
代理商： HY5PS1G431CFP-E3
Rev. 0.2 / Dec 2006
13
HY5PS1G431C(L)FP
HY5PS1G831C(L)FP
HY5PS1G1631C(L)FP
3.2.4 Differential Input AC logic Level
Note:
1. VIN(DC) specifies the allowable DC execution of each input of differential pair such as CK, CK, DQS, DQS, LDQS,
LDQS, UDQS and UDQS.
2. VID(DC) specifies the input differential voltage |VTR -VCP | required for switching, where VTR is the true input
(such as CK, DQS, LDQS or UDQS) level and VCP is the complementary input (such as CK, DQS, LDQS or UDQS)
level.
The minimum value is equal to VIH(DC) - V IL(DC).
Note:
1. VID(AC) specifies the input differential voltage |VTR -VCP | required for switching, where VTR is the true input sig-
nal
(such as CK, DQS, LDQS or UDQS) and VCP is the complementary input signal (such as CK, DQS, LDQS or UDQS).
The minimum value is equal to V IH(AC) - V IL(AC).
2. The typical value of VIX(AC) is expected to be about 0.5 * VDDQ of the transmitting device and VIX(AC) is
expected to track variations in VDDQ. VIX(AC) indicates the voltage at which differential input signals must cross.
3.2.5 Differential AC output parameters
Note:
1. The typical value of VOX(AC) is expected to be about 0.5 * V DDQ of the transmitting device and VOX(AC) is
expected to track variations in VDDQ. VOX(AC) indicates the voltage at
ωηιχη
differential output signals must
cross.
Symbol
Parameter
Min.
Max.
Units
Notes
V
ID
(ac)
ac differential input voltage
0.5
VDDQ + 0.6
V
1
V
IX
(ac)
ac differential cross point voltage
0.5 * VDDQ - 0.175
0.5 * VDDQ + 0.175
V
2
Symbol
Parameter
Min.
Max.
Units
Notes
V
OX
(ac)
ac differential cross point voltage
0.5 * VDDQ - 0.125
0.5 * VDDQ + 0.125
V
1
V
DDQ
Crossing point
V
SSQ
V
TR
V
CP
V
ID
V
IX or
V
OX
< Differential signal levels >
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