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參數(shù)資料
| 型號(hào)： | HX6656XVRC |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 32K x 8 ROM-SOI |
| 中文描述： | 32K的× 8 ROM的絕緣硅 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 155K |
| 代理商： | HX6656XVRC |
HX6656
2
FUNCTIONAL DIAGRAM
NCS
CE*
NOE
MODE
Q
L
H
L
Read
Data Out
H
X
XX
Deselected
High Z
X
L
XX
Disabled
High Z
SIGNAL DEFINITIONS
A: 0-14
Address input pins which select a particular eight-bit word within the memory array.
Q: 0-7
Data Output Pins.
NCS
Negative chip select, when at a low level allows normal read operation. When at a high level NCS forces the
ROM to a precharge condition, holds the data output drivers in a high impedance state and disables all input
buffers except CE. If this signal is not used it must be connected to VSS.
NOE
Negative output enable, when at a high level holds the data output drivers in a high impedance state. When
at a low level, the data output driver state is defined by NCS and CE. If this signal is not used it must be
connected to VSS.
CE*
Chip enable, when at a high level allows normal operation. When at a low level CE forces the ROM to a
precharge condition, holds the data output drivers in a high impedance state and disables all the input buffers
except the NCS input buffer. If this signal is not used it must be connected to VDD.
*Not Available in 28-lead DIP or 28-Lead Flat Pack
TRUTH TABLE
Notes:
X: VI=VIH or VIL
XX: VSS
≤VI≤VDD
NOE=H: High Z output state maintained
for NCS=X, CE=X
NCS
A:0-8,12-13
CE
NO E
CS CE OE
Row
Decoder
32,768 x 8
Memory
Array
A:9-11,14
#
Signal
All controls must b e
enab led for a signal to
p ass. (#: numb er of
b uffers, default = 1)
1 = enab led
Signal
4
Q:0-7
(0 = high Z)
11
Column Decoder
Data O utp ut
8
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PDF描述 |
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