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參數(shù)資料
| 型號： | HV3137X |
| 廠商： | SUPERTEX INC |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | 64-Channel Serial To Parallel Converter With Open Drain Outputs |
| 中文描述： | SIPO BASED PRPHL DRVR, UUC74 |
| 封裝： | DIE |
| 文件頁數(shù)： | 2/5頁 |
| 文件大?。?/td> | 447K |
| 代理商： | HV3137X |
2
Electrical Characteristics
(over recommended operating conditions unless noted)
DC Characteristics
Symbol
I
DD
Parameter
Min
Typ
Max
15
Units
mA
Conditions
V
DD
Supply Current
f
CLK
= 6MHz, f
DATA
= 3MHz
LE = LOW
I
DDQ
I
O(OFF)
I
IH
I
IL
V
OH
V
OL
Quiescent V
DD
Supply Current
Off State Output Current at 25
°
C, per Switch
250
μ
A
All V
IN
= 0V
Output high, and at 375V
100
nA
High-Level Logic Input Current
10
μ
A
V
IH
= V
DD
V
I
= 0V
ID
OUT
= -100
μ
A
IHV
OUT
= +1mA
ID
OUT
= +100
μ
A
I
OL
= -1mA
V
DS
= 100V
Low-Level Logic Input Current
-10
μ
A
High-Level Data Out
V
DD
-1V
V
Low-Level Output
HV
OUT
Data Out
10
V
1
V
V
OC
C
HVO
HV
OUT
Clamp Voltage
Output Capacitance per Channel
-3.0
V
3
pF
Symbol
f
CLK
t
W
t
SU
t
H
t
WLE
t
DLE
t
SLE
t
DHL
t
DLH
Parameter
Min
Typ
Max
6
Units
MHz
Conditions
Clock Frequency
Clock Width High or Low
83
ns
Data Setup Time Before Clock Falls
35
ns
Data Hold Time After Clock Falls
15
ns
Width of Latch Enable Pulse
83
ns
LE Delay Time After Falling Edge of Clock
35
ns
LE Setup Time Before Falling Edge of Clock
40
ns
Clock Delay Time Data High to Low
135
ns
Clock Delay Time Data Low to High
135
ns
AC Characteristics
Recommended Operating Conditions
Symbol
V
DD
HV
OUT
V
IH
V
IL
T
A
Parameter
Min
4.5
Typ
5
Max
5.5
Units
V
Logic supply voltage
High voltage output
8.0
375
V
High-level input voltage
3.5
V
DD
0.8
V
Low-level input voltage
0
V
Operating free-air temperature
-40
+85
°
C
Notes:
Power-up sequence should be the following:
1. Connect ground.
2. Apply V
DD
.
3. Set all inputs (Data, CLK, Enable, etc.) to a known state.
4. Apply V
PP
.
Power-down sequence should be the reverse of the above.
HV3137
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