
SWAP [m]
Description
Swap nibbles within the data memory
The low-order and high-order nibbles of the specified data memory (one of the
data memories) are interchanged.
[m].3~[m].0
[m].7~[m].4
Operation
Affected flag(s)
TC2
TC1
TO
PD
OV
Z
AC
C
–
–
–
–
–
–
–
–
SWAPA [m]
Description
Swap data memory-place result in the accumulator
The low-order and high-order nibbles of the specified data memory are
interchanged, writing the result to the accumulator. The contents of the data
memory remain unchanged.
ACC.3~ACC.0
←
[m].7~[m].4
ACC.7~ACC.4
←
[m].3~[m].0
Operation
Affected flag(s)
TC2
TC1
TO
PD
OV
Z
AC
C
–
–
–
–
–
–
–
–
SZ [m]
Description
Skip if data memory is zero
If the contents of the specified data memory are zero, the following instruc-
tion, fetched during the current instruction execution, is discarded and a
dummy cycle is replaced to get the proper instruction (two cycles). Otherwise
proceed with the next instruction (one cycle).
Skip if [m]=0
Operation
Affected flag(s)
TC2
TC1
TO
PD
OV
Z
AC
C
–
–
–
–
–
–
–
–
SZA [m]
Description
Move data memory to ACC, skip if zero
The contents of the specified data memory are copied to the accumulator. If
the contents is zero, the following instruction, fetched during the current
instruction execution, is discarded and a dummy cycle is replaced to get the
proper instruction (two cycles). Otherwise proceed with the next instruction
(one cycle).
Skip if [m]=0, ACC
←
[m]
Operation
Affected flag(s)
TC2
TC1
TO
PD
OV
Z
AC
C
–
–
–
–
–
–
–
–
HT48CXX/HT48RXX
46
25th May ’99