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參數(shù)資料
| 型號： | HS1-82C54RH-8 |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | XO, clock |
| 英文描述： | Radiation Hardened CMOS Programmable Interval Timer |
| 中文描述： | 3 TIMER(S), PROGRAMMABLE TIMER, CDIP24 |
| 文件頁數(shù)： | 18/21頁 |
| 文件大小： | 171K |
| 代理商： | HS1-82C54RH-8 |
965
HS-82C54RH
NOTES:
1. Counters are programmed for binary (not BCD) counting and for
reading/writing least significant byte (LSB) only.
2. The Counter is always selected (CS always low).
3. CW stands for “Control Word”; CW = 10 means a Control Word
of 10, Hex is written to the Counter.
4. LSB stands for “Least significant byte” of count.
5. Numbers below diagrams are count values. The lower number is
the least significant byte. The upper number is the most signifi-
cant byte. Since the Counter is programmed to read/write LSB
only, the most significant byte cannot be read.
6. N stands for an undefined count.
7. Vertical lines show transitions between count values.
FIGURE 21. MODE 4
CW = 18 LSB = 3
WR
CLK
GATE
OUT
CW = 18 LSB = 3
WR
CLK
GATE
OUT
CW = 18 LSB = 3
WR
CLK
GATE
OUT
LSB = 2
N
N
N
N
0
2
0
1
0
0
FE
FF
0
3
FF
FE
FF
FD
N
N
N
N
0
3
0
3
0
2
0
1
0
0
0
3
FF
FF
N
N
N
N
0
2
0
1
0
2
0
1
0
0
0
3
FF
FF
NOTES:
1. Counters are programmed for binary (not BCD) counting and for
reading/writing least significant byte (LSB) only.
2. The Counter is always selected (CS always low).
3. CW stands for “Control Word”; CW = 10 means a Control Word
of 10, Hex is written to the Counter.
4. LSB stands for “Least significant byte” of count.
5. Numbers below diagrams are count values. The lower number is
the least significant byte. The upper number is the most signifi-
cant byte. Since the Counter is programmed to read/write LSB
only, the most significant byte cannot be read.
6. N stands for an undefined count.
7. Vertical lines show transitions between count values.
FIGURE 22. MODE 5
WR
CLK
GATE
OUT
WR
CLK
GATE
OUT
WR
CLK
GATE
OUT
N
N
N
N
0
3
0
2
0
1
0
0
0
3
FF
FF
N
N
N
N
N
0
3
0
2
0
3
0
1
0
0
FF
FF
0
2
N
N
N
N
N
N
0
3
0
2
0
1
0
0
FF
FE
0
5
0
4
FF
FF
N
CW = 1A LSB = 3
CW = 1A LSB = 3
CW = 1A LSB = 3
LSB = 5
Spec Number
518059
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HS9-82C54RH-8 | Radiation Hardened CMOS Programmable Interval Timer |
| HS1-82C54RH-Q | Radiation Hardened CMOS Programmable Interval Timer |
| HS9-82C54RH-Q | Radiation Hardened CMOS Programmable Interval Timer |
| HS1-82C55ARH | Radiation Hardened CMOS Programmable Peripheral Interface |
| HS1-82C55ARH-Q | Radiation Hardened CMOS Programmable Peripheral Interface |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HS1-82C54RH-Q | 制造商:Intersil Corporation 功能描述:PROGRAMMABLE TIMER SGL 24PIN SBCDIP - Rail/Tube |
| HS1-82C55ARH | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened CMOS Programmable Peripheral Interface |
| HS1-82C55ARH-8 | 制造商:Intersil Corporation 功能描述:RAD HARD CMOS PROGRAMMABLE PERIPHERAL INTERFACE,DIP,CLS Q - Rail/Tube |
| HS1-82C55ARH-Q | 制造商:Intersil Corporation 功能描述:PERIPHERAL INTRFC 40CDIP - Rail/Tube |
| HS1-82C59ARH-8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interrupt Controller |
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