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參數(shù)資料
| 型號： | HS1-3282-8 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CMOS ARINC Bus Interface Circuit |
| 中文描述： | 1 CHANNEL(S), 100K bps, SERIAL COMM CONTROLLER, CDIP40 |
| 封裝： | CERDIP-40 |
| 文件頁數(shù)： | 10/15頁 |
| 文件大?。?/td> | 176K |
| 代理商： | HS1-3282-8 |
5-192
AC Electrical Performance Specifications
V
DD
= 5V
±
5%, T
A
= 0
o
C to +70
o
C (HS-3282-5),
T
A
= -55
o
C to +125
o
C (HS-3282-8)
PARAMETER
SYMBOL
CONDITIONS
LIMITS
UNITS
MIN
MAX
Clock Frequency
FC
V
DD
= 4.75V, 5.25V
-
1
MHz
Data Rate 1/
FD
V
DD
= 4.75V, 5.25V
-
100
kHz
Data Rate 2/
FD
V
DD
= 4.75V, 5.25V
-
12.5
kHz
Master Reset Pulse Width
TMR
V
DD
= 4.75V, 5.25V
200
-
ns
RECEIVER TIMING
Receiver Ready Time From 32nd Bit 1/
TD/R2
V
DD
= 4.75V, 5.25V
-
16
μ
s
Receiver Ready Time From 32nd Bit 2/
TD/R2
V
DD
= 4.75V, 5.25V
-
128
μ
s
Device Ready to Enable Time
TD/REN
V
DD
= 4.75V, 5.25V
0
-
ns
Data Enable Pulse Width
TEN
V
DD
= 4.75V, 5.25V
200
-
ns
Data Enable to Data Enable Time
TENEN
V
DD
= 4.75V, 5.25V
50
-
ns
Data Enable to Device Ready Reset Time
TEND/R
V
DD
= 4.75V, 5.25V
-
200
ns
Output Data Valid to Enable Time
TENDATA
V
DD
= 4.75V, 5.25V
-
200
ns
Data Enable to Data Select Time
TENSEL
V
DD
= 4.75V, 5.25V
20
-
ns
Data Select to Data Enable Time
TSELEN
V
DD
= 4.75V, 5.25V
20
-
ns
Output Data Disable Time
TDATAEN
V
DD
= 4.75V, 5.25V
-
80
ns
CONTROL WORD TIMING
Control Word Strobe Pulse Width
TCWSTR
V
DD
= 4.75V, 5.25V
130
-
ns
Control Word Setup Time
TCWSET
V
DD
= 4.75V, 5.25V
130
-
ns
Control Word Hold Time
TCWHLD
V
DD
= 4.75V, 5.25V
0
-
ns
TRANSMITTER FIFO Write Timing
Parallel Load Pulse Width
TPL
V
DD
= 4.75V, 5.25V
200
-
ns
Parallel Load to Parallel Load 2 Delay
TPL12
V
DD
= 4.75V, 5.25V
0
-
ns
Transmitter Ready Delay Time
TTX/R
V
DD
= 4.75V, 5.25V
-
840
ns
Data Word Setup Time
TDWSET
V
DD
= 4.75V, 5.25V
110
-
ns
Data Word Hold Time
TDWHLD
V
DD
= 4.75V, 5.25V
0
-
ns
TRANSMITTER Output Timing
Enable Transmit to Output Data Valid Time 1/
TENDAT
V
DD
= 4.75V, 5.25V
-
25
μ
s
Enable Transmit to Output Data Valid Time 2/
TENDAT
V
DD
= 4.75V, 5.25V
-
200
μ
s
Output Data Bit Time 1/
TBlT
V
DD
= 4.75V, 5.25V
4.95
5.05
μ
s
Output Data Bit Time 2/
TBlT
V
DD
= 4.75V, 5.25V
39.6
40.4
μ
s
Output Data Null Time 1/
TNULL
V
DD
= 4.75V, 5.25V
4.95
5.05
μ
s
Output Data Null Time 2/
TNULL
V
DD
= 4.75V, 5.25V
39.6
40.4
μ
s
HS-3282
相關PDF資料 |
PDF描述 |
|---|---|
| HS4-3282-8 | CMOS ARINC Bus Interface Circuit |
| HS4-3282-9 | CMOS ARINC Bus Interface Circuit |
| HS1-3374 | Radiation Hardened 8-Bit Bidirectional CMOS/TTL Level Converter |
| HS1-5104ARH | Radiation Hardened Low Noise Quad Operational Amplifier |
| HS1-5104ARH-T | Radiation Hardened Low Noise Quad Operational Amplifier |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HS1-3282B6040-001 | 制造商:Harris Corporation 功能描述: |
| HS1-3283-5 | 制造商:Harris Corporation 功能描述: |
| HS1-3308K2018 WAF | 制造商:Harris Corporation 功能描述: |
| HS1-3374 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 8-Bit Bidirectional CMOS/TTL Level Converter |
| HS1-3374RH-8 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 8-Bit Bidirectional CMOS/TTL Level Converter |
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