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2
Absolute Maximum Ratings
Thermal Information
Max Output Voltage, V
OUT
(Note 2). . . . . . . . . . . . . . . . . . . . . V
OC
Max Output Load Current, I
LOAD
(Per Output, Note 3) . . . . . . . . I
CL
Logic Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
Logic Supply Voltage, V
DD
. . . . . . . . . . . . . . . . . . . . . . -0.3V to +7V
Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . -40
o
C to 125
o
C
Junction Temperature Range . . . . . . . . . . . . . . . . -40
o
C to 150
o
C
Thermal Resistance (Typical, Notes 1, 4)
SOIC - PC Board Mount, Min. Copper . . . . . . . . . .
SOIC - PC Board Mount, 2 sq. in. Copper . . . . . . . .
Maximum Storage Temperature Range -55
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
θ
JA
(
o
C/W)
60
35
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
2. The MOSFET Output Drain is internally clamped with a Drain-to-Gate zener diode that turns on the MOSFET; holding the Drain at the
Output Clamp voltage V
OC
.
3. The output drive is protected by an internal current limit. The I
CL
over-current limiting threshold parameter specification defines the max-
imum current. The maximum current with all outputs ON may be further limited by dissipation.
4. Device dissipation is based on thermal resistance capability of the package in a normal operating environment. The junction to ambient
thermal resistance of 60
o
C/W is defined here as a PC Board mounted device with minimal copper. With approximately 2 square inches
of copper area as a heat sink, it is practical to achieve 35
o
C/W thermal resistance. Further reduction in the thermal resistance can be
achieved with additional PC Board Copper ground area or an external heat sink structure next to the ground leads at the center of the
package.
Electrical Specifications
V
DD
= 4.5V to 5.5V, V
SS
= 0V, T
A
= -40
o
C to 125
o
C; Unless Otherwise Specified
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
OUTPUTS DRIVERS (DR0 TO DR7)
Output Channel Resistance
r
DSON
I
OUT
= 0.5A
-
-
0.8
Over-Current Limiting Threshold
I
CL
1.5
-
3.5
A
Output Clamping Voltage
V
OC
40
50
60
V
Output Clamping Energy
E
OC
1ms Single Pulse Width, T
A
= 25
o
C,
(Refer to Figure 3 for SOA Limits).
-
85
-
mJ
Output OFF Leakage Current
I
LK
V
OUT
= 14.5V
-
-
180
μ
A
Open-Load Fault Threshold
R
OLD
V
OUT
= 14.5V, Output Off
4
-
200
k
Output Rise Time
t
R
R
L
= 30
,
V
OUT
= 14.5V
1
-
12
μ
s
Output Fall Time
t
F
R
L
= 30
,
V
OUT
= 14.5V
1
-
12
μ
s
Turn-On Delay
t
ON
R
L
= 30
,
V
OUT
= 14.5V
-
-
12
μ
s
Turn-Off Delay
t
OFF
R
L
= 30
,
V
OUT
= 14.5V
-
-
12
μ
s
POWER SUPPLY
Power On Reset Threshold
V
DD(POR)
3.2
-
4.4
V
V
DD
Logic Supply Current
I
DD
All Outputs ON or OFF
-
-
10
mA
LOGIC INPUTS (INx, SI, SCK, RST, CS)
High Level Input Voltage
V
IH
0.7xV
DD
-
-
V
Low Level Input Voltage
V
IL
-
-
0.2xV
DD
V
Input Hysteresis
V
ILHYS
0.8
-
-
V
High Output Voltage, SO, INT
V
OL
Current Sink = 1.6mA
-
-
0.4
V
Low Output Voltage, SO
V
OH
Current Source = -0.8mA
V
DD
-0.8
-
-
V
Input Pull-Down Current, INx
I
INPD
75
-
250
μ
A
Reset Input Pull-Up Current, RST
I
RPU
20
-
120
μ
A
HIP0060