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參數(shù)資料
| 型號： | HI7190 |
| 廠商： | Intersil Corporation |
| 英文描述： | 24-Bit, High Precision, Sigma Delta A/D Converter(24位高精密∑-Δ A/D轉(zhuǎn)換器) |
| 中文描述： | 24位，精度高，Σ-ΔA / D轉(zhuǎn)換（24位高精密Σ-Δ的A / D轉(zhuǎn)換器） |
| 文件頁數(shù)： | 5/25頁 |
| 文件大?。?/td> | 472K |
| 代理商： | HI7190 |
5
FN3612.10
June 27, 2006
Input Capacitance, C
IN
DIGITAL OUTPUTS
V
IN
= 0V
-
5.0
-
pF
Output Logic High Voltage, V
OH
Output Logic Low Voltage, V
OL
Output Three-State Leakage Current,
I
OZ
Digital Output Capacitance, C
OUT
TIMING CHARACTERISTICS
I
OUT
= -100
μ
A (Note 7)
I
OUT
= 3mA (Note 7)
V
OUT
= 0V, +5V (Note 7)
2.4
-
-
V
-
-
0.4
V
-10
1
10
μ
A
-
10
-
pF
SCLK Minimum Cycle Time, t
SCLK
SCLK Minimum Pulse Width, t
SCLKPW
CS to SCLK Precharge Time, t
PRE
DRDY Minimum High Pulse Width
200
-
-
ns
50
-
-
ns
50
-
-
ns
(Notes 2, 7)
500
-
-
ns
Data Setup to SCLK Rising Edge (Write),
t
DSU
Data Hold from SCLK Rising Edge
(Write), t
DHLD
Data Read Access from Instruction Byte
Write, t
ACC
Read Bit Valid from SCLK Falling Edge,
t
DV
Last Data Transfer to Data Ready
Inactive, t
DRDY
RESET Low Pulse Width
50
-
-
ns
0
-
-
ns
(Note 7)
-
-
40
ns
(Note 7)
-
-
40
ns
(Note 7)
-
35
-
ns
(Note 2)
100
-
-
ns
SYNC Low Pulse Width
(Note 2)
100
-
-
ns
Oscillator Clock Frequency
(Note 2)
0.1
-
10
MHz
Output Rise/Fall Time
(Note 2)
-
-
30
ns
Input Rise/Fall Time
(Note 2)
-
-
1
μ
s
POWER SUPPLY CHARACTERISTICS
IAV
DD
IAV
SS
IDV
DD
Power Dissipation, Active PD
A
Power Dissipation, Standby PD
S
PSRR
-
-
1.5
mA
-
-
2.0
mA
SCLK = 4MHz
-
-
3.0
mA
SB = ‘0’
-
15
32.5
mW
SB = ‘1’
-
5
-
mW
(Note 3)
-
-70
-
dB
NOTES:
2. Parameter guaranteed by design or characterization, not production tested.
3. Applies to both bipolar and unipolar input ranges.
4. These errors can be removed by re-calibrating at the desired operating temperature.
5. Applies after system calibration.
6. Fully differential input signal source is used.
7. See Load Test Circuit, Figure 4, R1 = 10k
Ω
, C
L
= 50pF.
8. 1 LSB = 298nV at 24 bits for a Full Scale Range of 5V.
9. V
REF
= V
RHI
- V
RLO.
10. These errors are on the order of the output noise shown in Table 1.
11. All inputs except OSC
1
. The OSC
1
input V
IH
is 3.5V minimum.
Electrical Specifications
AV
DD
= +5V, AV
SS
= -5V, DV
DD
= +5V, V
RHI
= +2.5V, V
RLO
= AGND = 0V, V
CM
= AGND,
PGIA Gain = 1, OSC
IN
= 10MHz, Bipolar Input Range Selected, f
N
= 10Hz
(Continued)
TEST CONDITIONS
PARAMETER
MIN
TYP
MAX
UNITS
HI7190
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