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參數(shù)資料
| 型號(hào)： | HI5813KIP |
| 廠商： | INTERSIL CORP |
| 元件分類： | ADC |
| 英文描述： | CMOS 3.3V, 25 Microsecond, 12-Bit, Sampling A/D Converter with Internal Track and Hold |
| 中文描述： | 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDIP24 |
| 封裝： | PLASTIC, DIP-24 |
| 文件頁(yè)數(shù)： | 7/11頁(yè) |
| 文件大?。?/td> | 153K |
| 代理商： | HI5813KIP |
6-1808
Pin Descriptions
FIGURE 8. OFFSET ERROR vs TEMPERATURE
FIGURE 9. FULL SCALE ERROR vs TEMPERATURE
FIGURE 10. SUPPLY CURRENT vs TEMPERATURE
FIGURE 11. DNL vs SUPPLY VOLTAGE
Typical Performance Curves
V
DD
= V
AA
+ = V
REF
+ = 3.3V
V
O
-50 -40 -30 -20 -10
0
TEMPERATURE (
o
C)
10 20
30 40 50
60 70 80 90
1.00
1.10
1.20
0.90
0.80
0.70
0.60
0.50
CLK = 600kHz
CLK = 500kHz
-1.00
-0.90
-0.80
-0.70
-0.60
-0.50
-0.40
-0.30
-0.20
-0.10
0.00
-50 -40 -30 -20 -10
0
TEMPERATURE (
o
C)
10 20 30 40 50 60
70 80 90
F
V
DD
= V
AA
+ = V
REF
+ = 3.3V
CLK = 500kHz
CLK = 600kHz
-50 -40 -30 -20 -10
0
10 20
30 40
50
60
70 80 90
TEMPERATURE (
o
C)
S
D
2.00
1.80
1.60
1.40
1.20
1.00
0.80
0.60
0.40
V
DD
= V
AA
+ = V
REF
+ = 3.3V
CLK = 500kHz
3.0
2.5
2.0
1.5
1.0
0.5
3.0
D
SUPPLY VOLTAGE (V)
CLK = 600kHz
CLK = 500kHz
3.1
3.2
3.3
3.4
3.5
3.6
V
DD
= V
AA
+ = V
REF
+
PIN #
NAME
DESCRIPTION
1
DRDY
Output flag signifying new data is available. Goes
high at end of clock period 15. Goes low when new
conversion is started.
2
D0
Bit 0 (Least Significant Bit, LSB).
3
D1
Bit 1.
4
D2
Bit 2.
5
D3
Bit 3.
6
D4
Bit 4.
7
D5
Bit 5.
8
D6
Bit 6.
9
D7
Bit 7.
10
D8
Bit 8.
11
D9
Bit 9.
12
V
SS
Digital Ground, (0V).
13
D10
Bit 10.
14
D11
Bit 11 (Most significant bit, MSB)
15
OEM
Three-State enable for D4-D11. Active Low Input.
16
V
AA
-
Analog Ground, (0V).
17
V
AA
+
Analog Positive Supply. (+3.3V) (See text.)
18
V
IN
Analog Input.
19
V
REF
+
Reference Voltage Positive Input, sets 4095
code end of input range.
20
V
REF
-
Reference Voltage Negative Input, sets 0 code
end of input range.
21
STRT
Start Conversion Input active low, recognized af-
ter end of clock period 15.
22
CLK
CLK Input. Conversion functions aresynchronized
to positive going edge. (See text)
23
OEL
Three-State Enable for D0 - D3. Active low input.
24
V
DD
Digital Positive Supply (+3.3V).
PIN #
NAME
DESCRIPTION
HI5813
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