參數(shù)資料
型號(hào): HEF4555BT
廠商: NXP Semiconductors N.V.
元件分類: 通用總線功能
英文描述: 1-of-4 decoder-demultiplexer
封裝: HEF4555BP<SOT38-4 (DIP16)|<<http://www.nxp.com/packages/SOT38-4.html<1<Always Pb-free,;HEF4555BT<SOT109-1 (SO16)|<<http://www.nxp.com/packages/SOT109-1.html<1<week
文件頁數(shù): 5/12頁
文件大?。?/td> 124K
代理商: HEF4555BT
HEF4555B_4
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 6 January 2010
5 of 12
NXP Semiconductors
HEF4555B
1-of-4 decoder/demultiplexer
11. Dynamic characteristics
[1]
The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (C
L
in pF).
Transition time t
t
is the same as the HIGH to LOW and LOW to HIGH transition times t
THL
and t
TLH
.
[2]
Table 7.
V
SS
= 0 V; T
amb
= 25
°
C; for test circuit see
Figure 5
; unless otherwise specified.
Symbol
Parameter
Conditions
t
PHL
HIGH to LOW
propagation delay
see
Figure 4
Dynamic characteristics
V
DD
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
Extrapolation formula
88 ns + (0.55 ns/pF)C
L
34 ns + (0.23 ns/pF)C
L
22 ns + (0.16 ns/pF)C
L
98 ns + (0.55 ns/pF)C
L
39 ns + (0.23 ns/pF)C
L
22 ns + (0.16 ns/pF C
L
[1]
113 ns + (0.55 ns/pF)C
L
44 ns + (0.23 ns/pF)C
L
32 ns + (0.16 ns/pF)C
L
123 ns + (0.55 ns/pF)C
L
44 ns + (0.23 ns/pF)C
L
32 ns + (0.16 ns/pF)C
L
[1]
,
[2]
10 ns + (1.00 ns/pF)C
L
9 ns + (0.42 ns/pF)C
L
6 ns + (0.28 ns/pF)C
L
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ
115
45
30
125
50
30
140
55
40
150
55
40
60
30
20
Max
230
90
65
250
95
65
280
105
75
295
110
75
120
60
40
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
nAn
nYn;
[1]
nE
nYn
t
PLH
LOW to HIGH
propagation delay
nAn
nYn
nE
nYn
t
t
transition time
on nYn
Table 8.
P
D
can be calculated from the formulas shown. V
SS
= 0 V; t
r
= t
f
20 ns; T
amb
= 25
°
C.
Symbol
Parameter
V
DD
Typical formula for P
D
(
μ
W)
P
D
dynamic power
dissipation
10 V
P
D
= 18800
×
f
i
+
Σ
(f
o
×
C
L
)
×
V
DD2
15 V
P
D
= 45700
×
f
i
+
Σ
(f
o
×
C
L
)
×
V
DD2
Dynamic power dissipation P
D
Where:
f
i
= input frequency in MHz,
f
o
= output frequency in MHz,
C
L
= output load capacitance in pF,
V
DD
= supply voltage in V,
Σ
(f
o
×
C
L
) = sum of the outputs.
5 V
P
D
= 4500
×
f
i
+
Σ
(f
o
×
C
L
)
×
V
DD2
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