參數(shù)資料
型號: HEF4520BT
廠商: NXP Semiconductors N.V.
元件分類: 通用總線功能
英文描述: Dual binary counter
封裝: HEF4520BP<SOT38-4 (DIP16)|<<http://www.nxp.com/packages/SOT38-4.html<1<Always Pb-free,;HEF4520BT<SOT109-1 (SO16)|<<http://www.nxp.com/packages/SOT109-1.html<1<week
文件頁數(shù): 3/13頁
文件大小: 130K
代理商: HEF4520BT
HEF4520B_5
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 10 December 2009
3 of 13
NXP Semiconductors
HEF4520B
Dual binary counter
6.
Pinning information
6.1 Pinning
6.2 Pin description
7.
Functional description
[1]
H = HIGH voltage level; L = LOW voltage level; X = don’t care;
= positive-going transition;
= negative-going transition.
Fig 4.
Pin configuration
HEF4520B
1CP0
V
DD
1CP1
2MR
1Q0
2Q3
1Q1
2Q2
1Q2
2Q1
1Q3
2Q0
1MR
2CP1
V
SS
2CP0
001aae704
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
Table 2.
Symbol
1CP0, 2CP0
1CP1, 2CP1
1Q0 to 1Q3
1MR, 2MR
V
SS
2Q0 to 2Q3
V
DD
Pin description
Pin
1, 9
2, 10
3, 4, 5, 6
7, 15
8
11, 12, 13, 14
16
Description
clock input (LOW-to-HIGH triggered)
clock input (HIGH-to-LOW triggered)
output
master reset input
ground supply voltage
output
supply voltage
Table 3.
nCP0
L
X
H
X
Function table
[1]
nCP1
H
X
L
X
nMR
L
L
L
L
L
L
H
Mode
counter advances
counter advances
no change
no change
no change
no change
nQ0 to nQ3 = LOW
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