參數(shù)資料
型號(hào): HEF4517BT
廠商: NXP Semiconductors N.V.
元件分類: 通用總線功能
英文描述: Dual 64-bit static shift register
封裝: HEF4517BP<SOT38-4 (DIP16)|<<http://www.nxp.com/packages/SOT38-4.html<1<Always Pb-free,;HEF4517BT<SOT162-1 (SO16)|<<http://www.nxp.com/packages/SOT162-1.html<1<Alway
文件頁數(shù): 6/16頁
文件大小: 159K
代理商: HEF4517BT
HEF4517B
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 11 November 2011
6 of 16
NXP Semiconductors
HEF4517B
Dual 64-bit static shift register
8. Recommended operating conditions
9. Static characteristics
Table 5.
Symbol
V
DD
V
I
T
amb
t/
V
Recommended operating conditions
Parameter
supply voltage
input voltage
ambient temperature
input transition rise and fall rate
Conditions
Min
3
0
40
-
-
-
Typ
-
-
-
-
-
-
Max
15
V
DD
+85
3.75
0.5
0.08
Unit
V
V
C
s/V
s/V
s/V
in free air
V
DD
= 5 V
V
DD
= 10 V
V
DD
= 15 V
Table 6.
V
SS
= 0 V; V
I
= V
SS
or V
DD
unless otherwise specified.
Symbol Parameter
Static characteristics
Conditions
V
DD
T
amb
=
40
C
Min
3.5
7.0
11.0
-
T
amb
= 25
C
Min
3.5
7.0
11.0
-
T
amb
= 85
C
Min
3.5
7.0
11.0
-
Unit
Max
-
-
-
1.5
Max
-
-
-
1.5
Max
-
-
-
1.5
V
IH
HIGH-level input voltage
I
O
< 1
A
5 V
10 V
15 V
5 V
V
V
V
V
V
IL
LOW-level input voltage
I
O
< 1
A
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
5 V
10 V
15 V
5 V
10 V
15 V
15 V
5 V
10 V
15 V
-
-
-
3.0
4.0
-
-
-
0.05
0.05
0.05
1.7
0.52
1.3
3.6
-
-
-
0.3
50
100
200
-
-
-
3.0
4.0
-
-
-
0.05
0.05
0.05
1.4
0.44
1.1
3.0
-
-
-
0.3
50
100
200
7.5
-
-
3.0
4.0
-
-
-
0.05
0.05
0.05
1.1
0.36
0.9
2.4
-
-
-
1.0
375
750
1500
-
V
V
V
V
V
V
V
V
mA
mA
mA
mA
mA
mA
mA
A
A
A
A
pF
V
OH
HIGH-level output voltage
I
O
< 1
A
4.95
9.95
14.95
-
-
-
-
-
-
-
0.52
1.3
3.6
-
-
-
-
-
4.95
9.95
14.95
-
-
-
-
-
-
-
0.44
1.1
3.0
-
-
-
-
-
4.95
9.95
14.95
-
-
-
-
-
-
-
0.36
0.9
2.4
-
-
-
-
-
V
OL
LOW-level output voltage
I
O
< 1
A
I
OH
HIGH-level output current
V
O
= 2.5 V
V
O
= 4.6 V
V
O
= 9.5 V
V
O
= 13.5 V
V
O
= 0.4 V
V
O
= 0.5 V
V
O
= 1.5 V
I
OL
LOW-level output current
I
I
I
DD
input leakage current
supply current
I
O
= 0 A
C
I
input capacitance
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