參數(shù)資料
型號： HEF4511BT
廠商： NXP Semiconductors N.V.
元件分類： 通用總線功能
英文描述： BCD to 7-segment latch-decoder-driver
封裝： HEF4511BP<SOT38-4 (DIP16)|<<http://www.nxp.com/packages/SOT38-4.html<1<Always Pb-free,;HEF4511BT<SOT109-1 (SO16)|<<http://www.nxp.com/packages/SOT109-1.html<1<week
文件頁數(shù)： 9/20頁
文件大?。?/td> 191K
代理商： HEF4511BT
HEF4511B
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 11 November 2011
9 of 20
NXP Semiconductors
HEF4511B
BCD to 7-segment latch/decoder/driver
[1]
The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (C
L
in pF).
t
PLH
LOW to HIGH
propagation delay
Dn
Qn;
see
Figure 6
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
108 ns + (0.55 ns/pF)C
L
44 ns + (0.23 ns/pF)C
L
32 ns + (0.16 ns/pF)C
L
133 ns + (0.55 ns/pF)C
L
59 ns + (0.23 ns/pF)C
L
42 ns + (0.16 ns/pF)C
L
78 ns + (0.55 ns/pF)C
L
29 ns + (0.23 ns/pF)C
L
22 ns + (0.16 ns/pF)C
L
33 ns + (0.55 ns/pF)C
L
19 ns + (0.23 ns/pF)C
L
17 ns + (0.16 ns/pF)C
L
10 ns + (1.00 ns/pF)C
L
9 ns + (0.42 ns/pF)C
L
6 ns + (0.28 ns/pF)C
L
20 ns + (1.00 ns/pF)C
L
13 ns + (0.06 ns/pF)C
L
10 ns + (0.06 ns/pF)C
L
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
50
25
20
60
30
25
80
40
35
135
55
40
160
70
50
105
40
30
60
30
25
60
30
20
25
16
13
25
12
9
30
15
12
40
20
17
270
110
80
320
140
100
210
80
60
120
60
50
120
60
40
50
32
26
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
LE
Qn;
see
Figure 6
BL
Qn;
see
Figure 6
LT
Qn;
see
Figure 6
t
THL
HIGH to LOW output
transition time
see
Figure 6
t
TLH
LOW to HIGH output
transition time
see
Figure 6
t
su
set-up time
Dn
LE;
see
Figure 7
t
h
hold time
Dn
LE;
see
Figure 7
t
W
pulse width
LE input LOW;
minimum width;
see
Figure 7
Table 8.
V
SS
= 0 V; T
amb
= 25
C; for test circuit see
Figure 8
.
Symbol
Parameter
Dynamic characteristics
…continued
Conditions
V
DD
Extrapolation formula
[1]
Min
Typ
Max
Unit
Table 9.
P
D
can be calculated from the formulas shown. V
SS
= 0 V; t
r
= t
f
20 ns; T
amb
= 25
C.
Symbol
Parameter
V
DD
Typical formula for P
D
(
W)
P
D
dynamic power
dissipation
10 V
P
D
= 4000
f
i
+
(f
o
C
L
)
V
DD2
15 V
P
D
= 10000
f
i
+
(f
o
C
L
)
V
DD2
Dynamic power dissipation P
D
where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
DD
= supply voltage in V;
(f
o
C
L
) = sum of the outputs.
5 V
P
D
= 1000
f
i
+
(f
o
C
L
)
V
DD2
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