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| 型號(hào)： | HEF4081BT |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 通用總線功能 |
| 英文描述： | Quad 2-input AND gate |
| 中文描述： | 四2輸入與門 |
| 封裝： | HEF4081BP<SOT27-1 (DIP14)|<<http://www.nxp.com/packages/SOT27-1.html<1<Always Pb-free,;HEF4081BT<SOT108|<<<1<week 32, 2004,;HEF4081BT<SOT108|<<<1<week 3 |
| 文件頁(yè)數(shù)： | 5/11頁(yè) |
| 文件大?。?/td> | 329K |
| 代理商： | HEF4081BT |
HEF4081B_6
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 06 — 2 December 2009
5 of 11
NXP Semiconductors
HEF4081B
Quad 2-input AND gate
10. Dynamic characteristics
[1]
The typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (C
L
in pF).
Table 7.
T
amb
= 25
°
C; for waveforms see
Figure 4
; for test circuit see
Figure 5
; unless otherwise specified.
[1]
Symbol Parameter
Conditions
V
DD
t
PHL
HIGH to LOW
propagation delay
10 V
15 V
t
PLH
LOW to HIGH
propagation delay
10 V
15 V
t
THL
HIGH to LOW output
transition time
10 V
15 V
t
TLH
LOW to HIGH output
transition time
10 V
15 V
Dynamic characteristics
Extrapolation formula
28 ns + (0.55 ns/pF)C
L
14 ns + (0.23 ns/pF)C
L
12 ns + (0.16 ns/pF)C
L
18 ns + (0.55 ns/pF)C
L
9 ns + (0.23 ns/pF)C
L
7 ns + (0.16 ns/pF)C
L
10 ns + (1.0 ns/pF)C
L
9 ns + (0.42 ns/pF)C
L
6 ns + (0.28 ns/pF)C
L
10 ns + (1.00 ns/pF)C
L
9 ns + (0.42 ns/pF)C
L
6 ns + (0.28 ns/pF)C
L
Min
Typ
55
25
20
45
20
15
60
30
20
60
30
20
Max
110
50
40
90
40
30
120
60
40
120
60
40
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
nA or nB to nY
5 V
-
-
-
-
-
-
-
-
-
-
-
-
nA or nB to nY
5 V
5 V
5 V
Table 8.
V
SS
= 0 V; t
r
= t
f
≤
20 ns; T
amb
= 25
°
C.
Symbol Parameter
P
D
dynamic power dissipation
Dynamic power dissipation
V
DD
5 V P
D
= 450
×
f
i
+
Σ
(f
o
×
C
L
)
×
V
DD2
(
μ
W)
10 V P
D
= 2900
×
f
i
+
Σ
(f
o
×
C
L
)
×
V
DD2
(
μ
W)
15 V P
D
= 11700
×
f
i
+
Σ
(f
o
×
C
L
)
×
V
DD2
(
μ
W)
Typical formula
where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
Σ
(f
o
×
C
L
) = sum of the outputs;
V
DD
= supply voltage in V.
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