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參數(shù)資料
| 型號： | HEF4059BT |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 通用總線功能 |
| 英文描述： | Programmable divide-by-n counter |
| 封裝： | HEF4059BP<SOT101-1 (DIP24)|<<http://www.nxp.com/packages/SOT101-1.html<1<Always Pb-free,;HEF4059BT<SOT137-1 (SO24)|<<http://www.nxp.com/packages/SOT137-1.html<1<wee |
| 文件頁數(shù)： | 4/6頁 |
| 文件大小： | 55K |
| 代理商： | HEF4059BT |
January 1995
4
Philips Semiconductors
Product specification
Programmable divide-by-n counter
HEF4059B
LSI
Figure 3 illustrates the operation of the counter in mode
÷
8 starting from the preset state 3.
Fig.3 Total count of 3.
CP INPUT
K
c
INPUT
(K
a
, K
b
= LOW)
internal state
of counter
O OUTPUT
If the ‘master preset’ mode is started two clock cycles or
less before an output pulse, the output pulse will appear at
the time due. If the ‘master preset’ mode is not used the
counter is preset in accordance with the ‘jam inputs when
the output pulse appears. A HIGH level at the latch enable
input (EL) will cause the counter output to go HIGH once
an output pulse occurs, and remain in the HIGH state until
EL input returns to LOW. If the EL input is LOW, the output
pulse will remain HIGH for only one cycle of the clock input
signal.
When K
a
= L, K
b
= H, K
c
= L and EL = L, the counter
operates in the ‘preset inhibit’ mode, with which the
dividend of the counter is fixed to 10 000, independent of
the state of the jam inputs.
When in the same state of mode select inputs EL = H, the
counter operates in the normal
÷
10 mode, however,
without the latch operation at the output.
Schmitt-trigger action in the clock input makes the circuit
highly tolerant to slower clock rise and fall times.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HEF4059BT,652 | 功能描述:計數(shù)器 IC COUNTR PROG DIV-BY-N RoHS:否 制造商:NXP Semiconductors 計數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計數(shù)法: 計數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| HEF4059BT,653 | 功能描述:計數(shù)器 IC PROGRMABLE DIVIDE BY RoHS:否 制造商:NXP Semiconductors 計數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計數(shù)法: 計數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| HEF4059BTD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Prescaler/Frequency Divider |
| HEF4059BTD-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Prescaler/Frequency Divider |
| HEF4059BT-T | 功能描述:計數(shù)器移位寄存器 PROGRMABLE DIVIDE BY N COUNTER RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
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