參數(shù)資料
型號: HEF4052BP
廠商: NXP Semiconductors N.V.
元件分類: 開關(guān)
英文描述: Dual 4-channel analog multiplexer-demultiplexer
封裝: HEF4052BP<SOT38-4 (DIP16)|<<http://www.nxp.com/packages/SOT38-4.html<1<Always Pb-free,;HEF4052BT<SOT109-1 (SO16)|<<http://www.nxp.com/packages/SOT109-1.html<1<week
文件頁數(shù): 11/22頁
文件大小: 199K
代理商: HEF4052BP
HEF4052B_7
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NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 07 — 26 March 2010
11 of 22
NXP Semiconductors
HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
11.1 Waveforms and test circuit
t
PZL
OFF-state to LOW
propagation delay
E to nYn, nZ; see
Figure 15
5 V
10 V
15 V
120
50
35
240
100
75
ns
ns
ns
Table 8.
T
amb
= 25
°
C; V
SS
= V
EE
= 0 V; for test circuit see
Figure 16
.
Symbol
Parameter
Dynamic characteristics
…continued
Conditions
V
DD
Typ
Max
Unit
Measurement points are given in
Table 9
.
Measurement points are given in
Table 9
.
Fig 13. nYn, nZ to nZ, nYn propagation delays
Fig 14. Sn to nYn, nZ propagation delays
001aac290
nYn or nZ
input
nZ or nYn
output
t
PLH
t
PHL
V
DD
V
EE
V
M
V
M
V
O
V
EE
001aac291
switch ON
t
PLH
t
PHL
switch OFF
V
DD
V
SS
V
O
V
EE
nYn or nZ
output
Sn input
switch OFF
10 %
90 %
V
M
Measurement points are given in
Table 9
.
Fig 15. Enable and disable times
001aac292
t
PLZ
t
PHZ
switch OFF
switch ON
switch ON
nYn or nZ output
LOW-to-OFF
OFF-to-LOW
nYn or nZ output
HIGH-to-OFF
OFF-to-HIGH
E input
V
O
V
O
V
EE
V
EE
V
DD
V
SS
V
M
t
PZL
t
PZH
90 %
90 %
10 %
10 %
Table 9.
Supply voltage
V
DD
5 V to 15 V
Measurement points
Input
V
M
0.5V
DD
Output
V
M
0.5V
DD
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