參數(shù)資料
型號: HEF4017BT
廠商: NXP Semiconductors N.V.
元件分類: 通用總線功能
英文描述: 5-stage Johnson decade counter
封裝: HEF4017BP<SOT38-4 (DIP16)|<<http://www.nxp.com/packages/SOT38-4.html<1<Always Pb-free,;HEF4017BT<SOT109-1 (SO16)|<<http://www.nxp.com/packages/SOT109-1.html<1<week
文件頁數(shù): 11/18頁
文件大?。?/td> 172K
代理商: HEF4017BT
HEF4017B
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 14 September 2011
11 of 18
NXP Semiconductors
HEF4017B
5-stage Johnson decade counter
13. Application information
Some examples of applications for the HEF4017B are:
Decade counter with decimal decoding
1 out of n decoding counter (when cascaded)
Sequential controller
Timer
Figure 11
shows a technique for extending the number of decoded output states for the
HEF4017B. Decoded outputs are sequential within each stage and from stage to stage,
with no dead time (except propagation delay).
a. Input waveforms
b. Test circuit
Test data is given in
Table 10
.
Definitions for test circuit:
DUT = Device Under Test;
C
L
= load capacitance including jig and probe capacitance;
R
T
= termination resistance should be equal to the output impedance Z
o
of the pulse generator.
Fig 10. Test circuit for measuring switching times
V
M
V
M
t
W
t
W
10 %
90 %
10 %
90 %
0 V
V
I
V
I
negative
pulse
positive
pulse
0 V
V
M
V
M
90 %
10 %
90 %
10 %
t
f
t
r
t
r
t
f
001aaj781
V
DD
V
I
V
O
001aag182
DUT
CL
RT
G
Table 10.
Supply voltage
V
DD
5 V to 15 V
Test data
Input
V
I
V
SS
or V
DD
Load
C
L
50 pF
t
r
, t
f
20 ns
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