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KING BILLION ELECTRONICS CO., LTD
駿
億
電
子
股
份
有
限
公
司
HE84G752B
HE80004 Series
January 21, 2005
This specification is subject to change without notice. Please contact sales person for the latest version before use.
44
V0.93
NAME
VALUE
10
11
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Fixed to “00”
000
001
010
011
100
101
110
111
000
001
010
011
100
101
110
111
0
1
00
01
10
11
Fixed to “0”
00
01
10
11
0
1
Fixed to “00”
NOTE
dual clock
fast clock only
WDT disable
WDT enable
open-drain output
push-pull output
open-drain output
push-pull output
open-drain output
push-pull output
open-drain output
push-pull output
open-drain output
push-pull output
IO pin
LCD pin
IO pin
LCD pin
MO_WDTE
MO_CPP[7:0]
MO_DPP[7:0]
MO_10PP[7:0]
MO_15PP[1:0]
MO_17PP[7:0]
MO_LIO15[1:0]
MO_LIO17[7:0]
MO_COM[1:0]
1/7 bias
1/7.5 bias
1/8 bias
1/8.5 bias
1/9 bias
1/9.5 bias
1/10 bias
1/5 bias
Ring-osc internal cap. Select C=2P
Ring-osc internal cap. Select C=4P
Ring-osc internal cap. Select C=7P
Ring-osc internal cap. Select C=14P
Ring-osc internal cap. Select C=20P
Ring-osc internal cap. Select C=40P
Ring-osc internal cap. Select C=50P
Ring-osc internal cap. Select C=60P
7-bit DAC/PWM output
8-bit DAC/PWM output
16 Gray Level
4 Gray Level
2 Level(B/W)
2 Level(B/W)
MO_LBSR[2:0]
MO_RCAP[2:0]
MO_8BVOC
MO_GRAY_MODE[1:0]
MO_EXMEM
LVD level voltage detect is 2.4V
LVD level voltage detect is 2.6V
LVD level voltage detect is 2.8V
LVD level voltage detect is 3.0V
Default State of the IRO is ‘0’
Default State of the IRO is ‘1’
MO_DLVL[1:0]
MO_IRO
MO_PMODE[1:0]
0
1
00
01
10
PRTD[1:0] = I/O Pin
PRTD[1:0] = UART Pin
Internal Mode(
Internal CP+External R String and Opamps
External CP+Internal R String and Opamps
MO_UART
MO_PSMODE[1:0]