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King Billion Electronics Co., Ltd
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HE83003
HE80000 SERIES
3.
Internal Block
September 8, 2004
This specification is subject to change without notice. Please contact sales person for the latest version before use.
3
V1.1
Please always take in mind that ICE is different from IC. ICE is the whole set of HE80000 series IC, but
each IC is a subset of ICE. Never use any hardware resources that real IC don’t have, especially RAM
and register. KBIDS and compiler cannot prevent user to use some hardware resources that don’t exist.
Please check the following table and refer the abbreviation in HE80000 user's manual.
FXI, FXO
8 Bit CPU
Fast Clock
OSC.
Slow Clock
OSC
36 KB ROM
128B RAM
TC1
TC2
WDT
SXI, SXO
PWM/PWMN
PWM
VO
DAC
OPO, OPIN, OPIP
OP Amp
PRTC[7:0], PRTD[7:0]
I/O Port
4.
Pin Description
Pin Name I/O
Description
FXI,
FXO
B,
O
External fast clock pin. Two types of oscillator can be selected by MO_FXTAL (‘0’ for RC type and
‘1’ for crystal type). For RC type oscillator, one resistor needs to be connected between FXI and GND.
For crystal oscillator, one crystal needs to be placed between FXI and FXO. Please refer to
application circuit for details.
External slow clock pins. Slow clock is clock source for LCD display, TIMER1, Time-Base and other
internal blocks. Both crystal and RC oscillator are provided. The slow clock type can be selected by
mask option MO_SXTAL. Choose ‘0’ for RC type and ‘1’ for crystal oscillator.
I
System reset input pin. Level trigger, active low on this pin will put the chip in reset state.
Test input pin. Please bond this pad and reserve a test point on PCB for debugging. But for improving
ESD, please connect this point with zero Ohm resistor to GND.
8-bit bi-directional I/O port C. The output type of I/O pad can also be selected by mask option
MO_CPP[7: 0] (‘1’ for push-pull and ‘0’ for open-drain). As the output structure of I/O pad does not
contain tri-state buffer. When using the I/O as input, ‘1’ must be outputted before reading the pin.
8-bit bi-directional I/O port D. The output type of I/O pad can also be selected by mask option
MO_DPP[7: 0] (‘1’ for push-pull and ‘0’ for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O as input, ‘1’
must be outputted before reading the pin.
PRTD[7..2] can be used as wake-up pins.
PRTD[7..6] can be as external interrupt sources.
SXI,
SXO
RSTP_N
I,
O
TSTP_P
I
PRTC[7:0]
B
PRTD[7:0]
B