參數(shù)資料
型號: HDM8513
廠商: Hynix Semiconductor Inc.
英文描述: Operational Amplifier (Op-Amp) IC; Package/Case:8-DIP; Op Amp Type:General Purpose
中文描述: 的DVB /決策支持系統(tǒng)兼容接收器
文件頁數(shù): 53/67頁
文件大?。?/td> 261K
代理商: HDM8513
53
1F
Clock Generation PLL Control
An integrated VCO is locked to MxN times a reference frequency
provided by a external clock
Bits [4:0]. N Divider ratio
It defines a feedback divider with a divider ratio N. The dafault is 15
(0FH).
Bit 5. M Divider ratio
It defines a reference divider with a divider ratio M. When this bit is set
to 1, the divider ratio M is 4. When this bit is set to 0, the divider ratio M
is 1. The default is 1.
Bit 6. PLL Enable
When this bit is set to 1, the generated clock of the PLL is connected
to the internal clock. When this bit is set to 0, the PLL is bypassed
and the external clock signal is directly connected to the internal
clock. The default is 0.
Bit 7.
This bit should be fixed to zero.
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參數(shù)描述
HDM8513A 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:DVB/DSS Compliant Receiver
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