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9
FN4235.6
June 6, 2006
Figure 14 shows the relationship between the saturation
guard voltage, the loop current and the loop resistance.
Notice from Figure 14 that for a loop resistance <1.2k
(R
SG
= 4.0k
) the SLIC is operating in the constant current feed
region and for resistances >1.2k
the SLIC is operating in
the resistive feed region. Operation in the resistive feed
region allows long loop and off-hook transmission by
keeping the tip and ring voltages off the rails. Operation in
this region is transparent to the customer.
The Saturation Guard circuit (Figure 12) monitors the tip to
ring voltage via the transconductance amplifier A
1
. A
1
generates a current that is proportional to the tip to ring
voltage difference. I
1
is internally set to sink all of A
1
’s
current until the tip to ring voltage exceeds 12.5V. When the
tip to ring voltage exceeds 12.5V (with no R
SG
resistor) A
1
supplies more current than I
1
can sink. When this happens
A
2
amplifies its input current by a factor of 12 and the current
through R
1
becomes the difference between I
2
and the
output current from A
2
. As the current from A
2
increases, the
voltage across R
1
decreases and the output voltage on R
DC
decreases. This results in a corresponding decrease in the
loop current. The R
SG
pin provides the ability to increase the
saturation guard reference voltage beyond 12.5V. Equation
3 gives the relationship between the R
SG
resistor value and
the programmable saturation guard reference voltage:
where:
V
SGREF
= Saturation Guard reference voltage, and
R
SG
= Saturation Guard programming resistor.
When the Saturation guard reference voltage is exceeded,
the tip to ring voltage is calculated using Equation 4:
where:
V
TR
= Voltage differential between tip and ring, and
R
L
= Loop resistance.
For on-hook transmission R
L
=
∞
, Equation 4 reduces to:
5
SG
The value of R
SG
should be calculated to allow maximum
loop length operation. This requires that the saturation guard
reference voltage be set as high as possible without clipping
the incoming or outgoing VF signal. A voltage margin of -4V
HC5515
V
TX
R
RX
R
DC1
R
DC2
C
DC
R
SN
R
DC
I
RSN
TIP
RING
-2.5V
I
RING
I
TIP
A
2
I
TIP
I
RING
R
SG
R
SG
-5V
LOOP CURRENT
CIRCUIT
SATURATION GUARD
CIRCUIT
A
1
I
1
I
2
R
1
+
-
+
-
+
-
+
-
FIGURE 12. DC LOOP CURRENT
-5V
-5V
17.3k
0
1.2K
-50
-40
-30
-20
-10
0
V
BAT
= -48V, I
L
= 23mA, R
SG
= 4.0k
SATURATION
GUARD VOLTAGE
LOOP RESISTANCE (
)
FIGURE 13. V
TR
vs R
L
V
TIP
V
RING
RESISTIVE FEED
REGION
T
CONSTANT CURRENT
FEED REGION
SATURATION
GUARD VOLTAGE
∞
0
10
20
30
0
10
20
30
40
50
LOOP CURRENT (mA)
T
V
BAT
= -24V, R
SG
=
∞
V
BAT
= -48V, R
SG
= 4.0k
SATURATION GUARD
VOLTAGE, V
TR
= 38V
RESISTIVE FEED
REGION
CONSTANT CURRENT
FEED REGION
R
SG
= 4.0k
R
SG
=
∞
100k
100k
4k
1.5k
2k
700
<400
<1.2k
R
L
R
L
SATURATION GUARD
VOLTAGE, V
TR
= 13V
FIGURE 14.
V
TR
vs I
L
and R
L
V
SGREF
12.5
+
5
R
SG
-----------------------------------
+
=
(EQ. 3)
V
TR
R
L
16.66
L
5
10
5
R
DC2
17300
+
(
)
+
+
R
DC1
+
------------------------------------------------------------------------------------
×
=
(EQ. 4)
V
TR
16.66
+
-----------------------------------
+
=
(EQ. 5)
HC5515