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參數(shù)資料
| 型號： | HC55130 |
| 廠商： | Intersil Corporation |
| 英文描述： | Ultra Low Power SLICs.(超低功耗用戶線路接口電路) |
| 中文描述： | 超低功耗SLIC組件。（超低功耗用戶線路接口電路） |
| 文件頁數(shù)： | 5/7頁 |
| 文件大?。?/td> | 83K |
| 代理商： | HC55130 |
4-5
Figure 6 gives the reference design using the Intersil
UniSLIC14 and the Texas Instruments TCM38C17 Quad
Combo. Also shown in Figure 6 are the voltage levels at
specific points in the circuit. These voltages will be used to
adjust the gains of the network.
Adjustment to Get -3.5dBm0 at the Load
Referenced to 600
The voltage equivalent to 0dBm0 into 811
(0dBm0
(811
)
)
is calculated using Equation 30 (811
is the impedance of
complex China load at 1020Hz).
2
The gain referenced back to 0dBm0
(600
)
is equal to:
0.90055V
RMS
The adjustment to get -3.5dBm0 at the load referenced to
600
is:
The voltage at the load (referenced to 600
) is given in
Equation 33:
Impedance Matching
The 2-wire impedance is matched to the line impedance Z
0
using Equation 1, repeated here in Equation 34.
Z
T
For a line impedance of 200 + 680//0.1
μ
F, Z
T
equals:
Z
T
= 28k
in series with the parallel combination of 136k
(
closest standard value for is 137k
and 500pF (closest
standard value for is 470pF).
To achieve a 4-wire to 2-wire gain (V
PCMIN
to V
2W
) that is
equivalent to 0dBm(600
) at the complex load, the gain
through the TCM38C17 (V
PCMIN
to V
PWRO+
) must equal -
2.19dBm (0.60196V
RMS
). The gain through the TCM38C17
will then equal -2.19dBm (0.60196V
RMS
) divided by the
input voltage 0dBm (0.7745V
RMS
). This gain is equal to
0.777.
The gain through the TCM38C17 (V
PCMIN
to V
PWRO+
) is
given in Equation 13 and repeated here in Equation 37.
Setting the gain equal to 0.777 we can now determine the
value of the gain setting resistors R
1
and R
2
. Selecting the
value of R
1
to be 49.9k
, R
2
is calculated to 5.27k
.
(Note: the value of R
1
+ R
2
should be greater than 10k
but
less than 100k
.)
R
1
4
FIGURE 5. REFERENCE DESIGN OF THE UniSLIC14 AND THE TCM38C17 WITH A 600
LOAD IMPEDANCE
PCM
Bus
0dBm0
(600
)
0.7745V
RMS
0dBm0
(600
)
0.7745V
RMS
0dBm0
(600
)
0.7745V
RMS
0dBm0
(600
)
0.7745V
RMS
0dBm0
(600
)
0.7745V
RMS
V
GSX
G4-2
G2-4
TIP
RING
INTERSIL
UniSLIC14
V
RX
V
TX
R
P
30
R
P
30
Z
O
PWRO+
V
2W
-
+
ANLGIN+
ANLGIN-
R
a2
TEXAS
V
IN
PCMIN
PCMOUT
AREF
+
-
+
-
+
-
INSTRUMENTS
TCM38C17
GSR
PWRO-
1
+
-
V
TR
+
-
PTG
FLOATING
R
a1
R
f
= 60.4k
Z
T
107k
Z
T
-0.915dBm0
(600
)
0.6970V
RMS
48.6k
53.6k
0dBm
811
(
)
10
)
-----------------------------
log
0.90055V
RMS
=
=
(EQ. 30)
GAIN
20
--------------------------------------
log
1.309dB
=
=
(EQ. 31)
Adjustment
3.5dBm0
–
1.309dBm0
+
2.19
–
dB
=
=
(EQ. 32)
2.19
–
dBm
600
(
)
10
2
)
-----------------------------
log
0.60196V
RMS
=
=
(EQ. 33)
200
Z
TR
2R
P
–
(
)
=
(EQ. 34)
Z
T
200
200
1
j
ω
680 0.1
)
X10
6
–
+
--------------------------------------------------------
2
( )
30
(
)
–
+
=
(EQ. 35)
Z
T
200
140
(
)
200
680
F
---------------
||
+
=
(EQ. 36)
G
PCMIN
(
PWRO
–
)
R
R
1
4
+
4 R
2
------
+
------------------------------
=
(EQ. 37)
0.777
R
+
4 R
2
------
+
------------------------------
=
(EQ. 38)
Application Note 9903
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HC55130IB | 制造商:Rochester Electronics LLC 功能描述:LOW PWR SLIC,63DB BALANCE - Bulk |
| HC55130IB96 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Power Universal SLIC Family |
| HC55130IBZ | 功能描述:電信線路管理 IC LW PWR SLIC 63DB BALANCE RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| HC55130IBZ96 | 功能描述:電信線路管理 IC LW PWR SLIC 63DB BALANCE RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| HC55130IM | 制造商:Rochester Electronics LLC 功能描述:LOW PWR SLIC,63DB BALANCE - Bulk 制造商:Harris Corporation 功能描述: |
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