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| 型號(hào)： | GS841Z18AGT-166 |
| 廠商： | GSI TECHNOLOGY |
| 元件分類(lèi)： | DRAM |
| 英文描述： | 4Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| 中文描述： | 256K X 18 ZBT SRAM, 8.5 ns, PQFP100 |
| 封裝： | ROHS COMPLIANT, TQFP-100 |
| 文件頁(yè)數(shù)： | 7/30頁(yè) |
| 文件大?。?/td> | 495K |
| 代理商： | GS841Z18AGT-166 |
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GS841Z18/36AT-180/166/150/100
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.02 11/2004
7/30
2001, GSI Technology
Pipeline and Flow Through Read-Write Control State Diagram
Deselect
New Read
New Write
Burst Read
Burst Write
W
R
B
R
B
W
D
D
B
B
W
R
D
B
W
R
D
D
Current State (n)
Next State (n+1)
Transition
Input Command Code
Key
Notes
1. The Hold command (CKE Low) is not
shown because it prevents any state change.
2. W, R, B and D represent input command
codes, as indicated in the Synchronous Truth Table.
Clock (CK)
Command
Current State
Next State
n
n+1
n+2
n+3
Current State and Next State Definition for
Pipelined and Flow Through Read/Write Control State Diagram
W
R
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS841Z18AGT-166I | 4Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| GS841Z18AGT-180 | 4Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| GS841Z18AGT-180I | 4Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| GS841Z18AT | 4Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| GS841Z18AT-100 | 4Mb Pipelined and Flow Through Synchronous NBT SRAMs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS841Z18AGT-166I | 制造商:GSI 制造商全稱(chēng):GSI Technology 功能描述:4Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| GS841Z18AGT-180 | 制造商:GSI 制造商全稱(chēng):GSI Technology 功能描述:4Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| GS841Z18AGT-180I | 制造商:GSI 制造商全稱(chēng):GSI Technology 功能描述:4Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| GS841Z18AT | 制造商:GSI 制造商全稱(chēng):GSI Technology 功能描述:4Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| GS841Z18AT-100 | 制造商:GSI 制造商全稱(chēng):GSI Technology 功能描述:4Mb Pipelined and Flow Through Synchronous NBT SRAMs |
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