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| 型號(hào)： | GS8321Z18E-133V |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | 36Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| 中文描述： | 2M X 18 ZBT SRAM, 8.5 ns, PBGA165 |
| 封裝： | 15 X 17 MM, 1 MM PITCH, FPBGA-165 |
| 文件頁(yè)數(shù)： | 10/32頁(yè) |
| 文件大?。?/td> | 737K |
| 代理商： | GS8321Z18E-133V |
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GS8321Z18/32/36E-xxxV
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.05 6/2006
10/32
2003, GSI Technology
Intermediate
Intermediate
Intermediate
Intermediate
Intermediate
Intermediate
High Z
(Data In)
Data Out
(Q Valid)
High Z
B W
B
R
B
D
R
W
R
W
D
D
Current State (n)
Next State (n+2)
Transition
Input Command Code
Key
Transition
Intermediate State (N+1)
Notes:
1. The Hold command (CKE Low) is not
shown because it prevents any state change.
2. W, R, B, and D represent input command
codes as indicated in the Truth Tables.
Clock (CK)
Command
Current State
Intermediate
State
n
n+1
n+2
n+3
Current State and Next State Definition for
Pipeline Mode Data I/O State Diagram
Next State
Pipeline Mode Data I/O State Diagram
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| GS8321Z18E-150 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:36Mb Pipelined and Flow Through Synchronous NBT SRAMs |
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| GS8321Z18E-166 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:36Mb Pipelined and Flow Through Synchronous NBT SRAMs |
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