參數(shù)資料
型號: ES29BDS640D-90RTG
廠商: 優(yōu)先(蘇州)半導(dǎo)體有限公司
英文描述: 8Mbit(1M x 8/512K x 16) CMOS 3.0 Volt-only, Boot Sector Flash Memory
中文描述: 8Mbit(3米x 8/512K × 16),3.0伏的CMOS只,引導(dǎo)扇區(qū)閃存
文件頁數(shù): 33/50頁
文件大小: 698K
代理商: ES29BDS640D-90RTG
ESI
33
Rev. 1D January 5, 2006
ES29LV800D
Excel Semiconductor inc.
AC CHARACTERISTICS
Table 12. Erase and Program Operations
Parameter
Description
70
90
120
Unit
JEDEC
Std.
t
AVAV
t
WC
Write Cycle Time (Note 1)
Min
70
90
120
ns
t
AVWL
t
AS
Address Setup Time
Min
0
ns
t
ASO
Address Setup Time to OE# low during toggle bit polling
Min
15
ns
t
WLAX
t
AH
Address Hold Time
Min
45
45
50
ns
t
AHT
Address Hold Time From CE# or OE# high during toggle bit polling
Min
0
ns
t
DVWH
t
DS
Data Setup Time
Min
35
45
50
ns
t
WHDX
t
DH
Data Hold Time
Min
0
ns
t
OEPH
Output Enable High during toggle bit polling
Min
20
ns
t
GHWL
t
GHWL
Read Recovery Time Before Write (OE# High to WE# Low)
Min
0
ns
t
ELWL
t
CS
CE# Setup Time
Min
0
ns
t
WHEH
t
CH
CE# Hold Time
Min
0
ns
t
WLWH
t
WP
Write Pulse Width
Min
35
35
50
ns
t
WHDL
t
WPH
Write Pulse Width High
Min
30
ns
t
SR/W
Latency Between Read and Write Operations
Min
0
ns
t
WHWH1
t
WHWH1
Programming Operation (Note 2)
Byte
Typ
6
us
Word
Typ
8
t
WHWH2
t
WHWH2
Sector Erase Operation (Note 2)
Typ
0.7
sec
t
VCS
Vcc Setup Time (Note 1)
Min
50
us
t
RB
Write Recovery Time from RY/BY#
Min
0
ns
t
BUSY
Program/Erase Valid to RY/BY# Delay
Max
90
ns
Notes:
1. Not 100% tested.
2. See the “Erase And Programming Performance” section for more information.
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