參數(shù)資料
型號: AT27C2048-55PI
廠商: ATMEL CORP
元件分類: DRAM
英文描述: 12-Bit Asynchronous Binary Counter 16-SO -40 to 85
中文描述: 128K X 16 OTPROM, 55 ns, PDIP40
封裝: 0.600 INCH, PLASTIC, MS-011AC, DIP-40
文件頁數(shù): 7/9頁
文件大?。?/td> 163K
代理商: AT27C2048-55PI
AT27C2048
7
AC Programming Characteristics
T
A
= 25
±
5°C, V
CC
= 6.5
±
0.25V, V
PP
= 13.0
±
0.25V
Test Conditions
(1)
Notes:
1.
2.
V
CC
must be applied simultaneously or before V
PP
and removed simultaneously or after V
PP
.
This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven
—see timing diagram.
Program Pulse width tolerance is 50
μ
sec
±
5%.
3.
Atmel’s 27C2048 Intergrated Product Identification Code
Symbol
AC Conditions of Test
Limits
Units
Parameter
Min
Max
t
AS
t
OES
t
DS
t
AH
t
DH
t
DFP
t
VPS
t
VCS
t
PW
t
OE
Address Setup Time
Input Rise and Fall Times
(10% to 90%) 20ns
Input Pulse Levels
0.45V to 2.4V
Input Timing Reference Level
0.8V to 2.0V
Output Timing Reference Level
0.8V to 2.0V
2
μ
s
OE Setup Time
2
μ
s
Data Setup Time
2
μ
s
Address Hold Time
0
μ
s
Data Hold Time
OE High to Output Float Delay
(2)
2
μ
s
0
130
ns
V
PP
Setup Time
V
CC
Setup Time
PGM Program Pulse Width
(3)
2
μ
s
2
μ
s
47.5
52.5
μ
s
Data Valid from OE
150
ns
t
PRT
V
PP
Pulse Rise Time During
Programming
50
ns
Codes
Pins
Hex
Data
A0
015-08
O7
O6
O5
O4
O3
O2
O1
O0
Manufacturer
0
0
0
0
0
1
1
1
1
0
001E
Device Type
1
0
1
1
1
1
0
1
1
1
00F7
相關PDF資料
PDF描述
AT27C2048-55VC 2-Megabit 128K x 16 OTP EPROM
AT27C2048-55VI 12-Bit Asynchronous Binary Counter 16-TSSOP -40 to 85
AT27C2048-70JC 12-Bit Asynchronous Binary Counter 16-TSSOP -40 to 85
AT27C2048-70JI 2-Megabit 128K x 16 OTP EPROM
AT27C2048-70PC 12-Bit Asynchronous Binary Counter 16-TSSOP -40 to 85
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