參數(shù)資料
型號： AD8224ACPZ-WP
廠商： Analog Devices Inc
文件頁數(shù)： 16/28頁
文件大小： 0K
描述： IC AMP INST JFET R-R LP 16LFCSP
標準包裝： 64
放大器類型： 儀表
電路數(shù)： 2
輸出類型： 滿擺幅
轉(zhuǎn)換速率： 2 V/µs
-3db帶寬： 1.5MHz
電流 - 輸入偏壓： 25pA
電壓 - 輸入偏移： 300µV
電流 - 電源： 750µA
電流 - 輸出 / 通道： 15mA
電壓 - 電源，單路/雙路(±)： 4.5 V ~ 36 V，±2.25 V ~ 18 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 16-VQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 16-LFCSP-VQ
包裝： 托盤 - 晶粒
配用： AD8224-EVALZ-ND - BOARD EVALUATION AD8224
Data Sheet
AD8224
Rev. C | Page 23 of 28
For applications where the AD8224 encounters extreme
overload voltages, as in cardiac defibrillators, external series
resistors and low leakage diode clamps, such as BAV199Ls,
FJH1100s, or SP720s, should be used.
TRANSFORMER
+VS
REF
–VS
AD8224
INCORRECT
TRANSFORMER
+VS
REF
–VS
AD8224
CORRECT
CAPACITIVELY COUPLED
+VS
REF
C
–VS
AD8224
CAPACITIVELY COUPLED
+VS
REF
C
R
C
–VS
AD8224
1
fHIGH-PASS = 2πRC
06286-
060
Figure 59. Creating an IBIAS Path
RF INTERFERENCE
RF rectification is often a problem in applications where there are
large RF signals. The problem appears as a small dc offset voltage.
The AD8224 by its nature has a 5 pF gate capacitance (CG) at its
inputs. Matched series resistors form a natural low-pass filter that
reduces rectification at high frequency (see Figure 60).
AD8224
VOUT
CG
–VS
REF
–VS
R
+IN
–IN
+15V
–15V
0.1F
10F
0.1F
10F
06286-
061
+
Figure 60. RFI Filtering Without External Capacitors
The relationship between external, matched series resistors and
the internal gate capacitance is expressed as
G
DIFF
RC
FilterFreq
π
=
2
1
G
CM
RC
FilterFreq
π
=
2
1
To eliminate high frequency common-mode signals while using
smaller source resistors, a low-pass RC network can be placed at
the input of the instrumentation amplifier (see Figure 61). The
filter limits the input signal bandwidth according to the
following relationship:
)
2
(
2
1
G
C
D
DIFF
C
R
FilterFreq
+
π
=
)
(
2
1
G
C
CM
C
R
FilterFreq
+
π
=
Mismatched CC capacitors result in mismatched low-pass filters.
The imbalance causes the AD8224 to treat what would have
been a common-mode signal as a differential signal. To reduce
the effect of mismatched external CC capacitors, select a value of
CD greater than 10 times CC. This sets the differential filter
frequency lower than the common-mode frequency.
R
AD8224
+15V
+IN
–IN
0.1F
10F
0.1F
REF
VOUT
–15V
CD
CC
10nF
1nF
4.02k
06286-
062
+
Figure 61. RFI Suppression
COMMON-MODE INPUT VOLTAGE RANGE
The 3-op amp architecture of the AD8224 applies gain and then
removes the common-mode voltage. Therefore, internal nodes
in the AD8224 experience a combination of both the gained
signal and the common-mode signal. This combined signal can
be limited by the voltage supplies even when the individual input
and output signals are not. Figure 24 through Figure 27 show the
allowable common-mode input voltage ranges for various
output voltages, supply voltages, and gains.
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