參數(shù)資料
型號: EN27LV020B-120
廠商: Electronic Theatre Controls, Inc.
英文描述: 2Megabit Low Voltage EPROM (256K x 8)
中文描述: 2Megabit低電壓存儲器(256K × 8)
文件頁數(shù): 3/13頁
文件大小: 96K
代理商: EN27LV020B-120
4800 Great America Parkway Ste 202
Santa Clara, CA. 95054
Tel: 408-235-8680
Fax: 408-235-8685
Preliminary
3
EN27LV020 / EN27LV020B
FIGURE 4. BLOCK DIAGRAM
FUNCTIONAL DESCRIPTION
THE QUIKRITE
TM
PROGRAMMING OF THE EN27LV020 / EN27LV020B
When the EN27LV020 / EN27LV020B is delivered, the chip has all 2M bits in the “ONE”, or
HIGH state. “ZEROs” are loaded into the EN27LV020 / EN27LV020B through the procedure
of programming.
The programming mode is entered when 12.75
±
0.25V is applied to the V
PP
pin,
OE
is at
V
IH
, and
CE
and
PGM
are at V
IL
. For programming, the data to be programmed is applied
with 8 bits in parallel to the data pins.
The QUIKRITE
TM
programming flowchart in Figure 5 shows Eon’s interactive programming
algorithm. The interactive algorithm reduces programming time by using 20
μ
s to 100
μ
s
programming pulses and giving each address only as many pulses as is necessary in order to
reliably program the data. After each pulse is applied to a given address, the data in that
address is verified. If the data is not verified, additional pulses are given until it is verified or
until the maximum number of pulses is reached. This process is repeated while sequencing
through each address of the EN27LV020 / EN27LV020B. This part of the programming
algorithm is done at V
CC
= 6.25V to assure that each EPROM bit is programmed to a
sufficiently high threshold voltage. This ensures that all bits have sufficient margin. After the
final address is completed, the entire EPROM memory is read at V
CC
= V
PP
= 5.25
±
0.25V to
verify the entire memory. EN27LV020 / EN27LV020B can be programmed using the same
programming algorithm as the 5V Read EPROM EN27C020.
CONTROL
LOGIC
INPUT/
OUTPUT
BUFFERS
Y-DECODER
X-DECODER
Y-SELECT
2M BIT
CELL
MATRIX
Vcc
Vpp
Vss
A0 - A17
ADDRESS
INPUTS
DQ0 - DQ7
8
1024
2048
CE
PGM
OE
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